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參數(shù)資料
| 型號： | MC68HC705L1B |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP56 |
| 封裝： | SDIP-56 |
| 文件頁數(shù)： | 76/102頁 |
| 文件大?。?/td> | 632K |
| 代理商： | MC68HC705L1B |
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MC68HC05L1
MOTOROLA
9-1
LOW POWER MODES
9
LOW POWER MODES
There are two low power modes for the MC68HC05L1, Stop and Wait modes. They are described
in this section.
9.1
Stop Mode
This is the lowest power consumption mode for the MCU. When the processor executes the STOP
instruction, the internal clock is turned off. This halts all internal CPU processing, including the
operation of the Programmable Timer and ADC. The I bit in the Condition Code register is cleared
to enable external interrupt IRQ. All registers and memory remain unaltered, and all input/output
lines remain unchanged.
The MCU is exited from Stop mode by an interrupt on IRQ, or any resets (logic low on RESET pin
or a power-on reset). On exit from Stop mode, the program counter is loaded with the
corresponding interrupt vector (see Table 4-2). The effects of the Stop mode on each of the MCU
peripheral systems are below.
9.1.1
Timer during Stop Mode
When Stop mode is entered, the timer counter stops counting (the internal processor clock is
stopped) and remains at that particular count value until Stop mode is exited. If the exit was
caused by reset, the counter is forced to $FFFC. If the Stop mode is exited by an interrupt IRQ,
the counter resumes counting from the value when it entered the Stop mode. Another feature of
the programmable timer in the Stop mode is, that if at least one valid input capture edge occurs at
the TCAP1 or TCAP2 pin, the input capture detect circuitry is armed. This action does not set any
timer ags or "wake up" the MCU, but when the MCU does "wake up" there will be an active input
capture ag (and data) from that rst valid edge which occurred during the Stop mode. Notice that
an exit by a reset will reset the entire MCU and thus, this function on the TCAP1/TCAP2 will not
happen.
TPG
73
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