參數(shù)資料
型號： MC68HC705L1B
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP56
封裝： SDIP-56
文件頁數(shù)： 79/102頁
文件大小： 632K
代理商： MC68HC705L1B
MOTOROLA
10-2
MC68HC05L1
OPERATING MODES
10
10.1
User Mode (Normal Operation)
The normal operating mode of the MC68HC05L1/
MC68HC705L1 is the user mode. The user
mode will be entered if the RESET line is brought low, and the IRQ pin is within its normal
operational range (VSS to VDD), the rising edge of the RESET will cause the MCU to enter the user
mode.
10.2
Self-Check Mode
The MC68HC05L1 self-check mode is for the user to check device functions with an on-chip
self-check program masked at location $1E00 to $1FDF under minimum hardware support. The
hardware is shown in Figure 10-3. Figure 10-2 is the criteria to enter self-check mode, where
TCAP1’s condition is latched within rst two clock cycles after the rising edge of the reset. TCAP1
can then be used for other purposes. After entering the self-check mode, CPU branches to the
self-check program and carries out the self-check. Self-check is a repetitive test, i.e. if all parts are
checked to be good, the CPU will repeat the self-check again. Therefore, the LEDs attached to
Port A will be ashing if the device is good; else the combination of LEDs’ on-off pattern can show
what part of the device is suspected to be bad. Table 10-2 lists the LEDs’ on-off patterns and their
corresponding indications.
Table 10-1 Mode Selection
RESET
IRQ
TCAP1
MODE
VSS to VDD
USER
+9V Rising Edge*
VDD
SELF-CHECK/
BOOTSTRAP
* Minimum hold time should be 2 clock cycles, after that it can be used as a normal IRQ
function pin.
Figure 10-2 Self-Check Mode Timing
5V
9V
TCAP1
IRQ
RESET
+5V
+9V
TPG
76
相關(guān)PDF資料
PDF描述
MC68HC05L1FU 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP64
MC68HC05L1B 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
MC68HC705L2B 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP42
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相關(guān)代理商/技術(shù)參數(shù)
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