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參數(shù)資料
| 型號： | MC68HC05L16CFU |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數(shù)： | 88/146頁 |
| 文件大?。?/td> | 852K |
| 代理商： | MC68HC05L16CFU |
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Resets and Interrupts
MC68HC05L16 MC68HC705L16 Data Sheet, Rev. 4.1
46
Freescale Semiconductor
4.4 Interrupt Status Register
IRQ1F — IRQ1 Interrupt Flag
When IRQ1S = 0, the falling edge or low level at the IRQ1 pin sets IRQ1F. When IRQ1S = 1, only the
falling edge sets the IRQ1F bit. If the IRQ1E bit and this bit are set, an interrupt is generated. This
read-only bit is cleared by writing a logic 1 to the RIRQ1 bit. Reset clears this bit.
IRQ2F — IRQ2 Interrupt Flag
When IRQ2S = 0, the falling edge or low level at the IRQ2 pin sets IRQ2F. When IRQ2S = 1, only the
falling edge sets the IRQ2F bit. If the IRQ2E bit and this bit are set, an interrupt is generated. This
read-only bit is cleared by writing a logic 1 to the RIRQ2 bit. Reset clears this bit.
Bit 5 — Reserved
This bit is not used and is always read as logic 0.
KWIF — Key Wakeup Interrupt Flag
When the KWIEx bit in the KWIEN register is set, the falling edge at the KWIx pin sets the KWIF bit. If
the KWIE bit and this bit are set, an interrupt is generated. This read-only bit is cleared by writing a
logic 1 to the RKWIF bit. Reset clears this bit.
RIRQ1 — Reset IRQ1 Flag
The RIRQ1 bit is a write-only bit and is always read as logic 0. Writing a logic 1 to this bit clears the
IRQ1F bit and writing logic 0 to this bit has no effect.
RIRQ2 — Reset IRQ2 Flag
The RIRQ2 bit is a write-only bit and is always read as logic 0. Writing a logic 1 to this bit clears the
IRQ2F bit and writing a logic 0 to this bit has no effect.
Bit 1 — Reserved
This bit is not used and is always read as logic 0.
RKWIF — Reset KWI Flag
The RKWIF bit is a write-only bit and is always read as logic 0. Writing a logic 1 to this bit clears the
KWIF bit and writing a logic 0 to this bit has no effect.
Address:
$0009
Bit 7
654321
Bit 0
Read:
IRQ1F
IRQ2F
0
KWIF
0
Write:
RIRQ1
RIRQ2
RKWIF
Reset:
00000000
= Unimplemented
Figure 4-8. Interrupt Status Register (INTSR)
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