參數(shù)資料
型號(hào): MC68HC05BD5P
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 70/112頁
文件大?。?/td> 676K
代理商: MC68HC05BD5P
MOTOROLA
7-14
MC68HC05BD3
M-BUS SERIAL INTERFACE
7
is accomplished with MAL=1 and MSTA=0. If one master attempts to start transmission while the
bus is being controlled by another master, the transmission will be inhibited; the MSTA bit will be
changed from 1 to 0 without generating STOP condition; an interrupt will be generated and the
MAL bit set to indicate that the attempt to acquire the bus has failed. Considering these cases, the
slave service routine should test the MAL bit rst, and software should clear the MAL bit if it is set.
TPG
58
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