參數(shù)資料
型號(hào)： MC68HC05BD5P
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁(yè)數(shù)： 100/112頁(yè)
文件大小： 676K
代理商： MC68HC05BD5P
MOTOROLA
10-2
MC68HC05BD3
LOW POWER MODES
10
10.3
COP Watchdog Timer Considerations
The COP watchdog timer is always enabled in MC68HC05BD3. It will reset the MCU when it times
out. For a system that must have intentional uses of the WAIT Mode, care must be taken to prevent
such situations from happening during normal operations by arranging timely interrupts to reset
the COP watchdog timer.
Figure 10-1 WAIT Flowchart
Y
External
N
WAIT
External oscillator active
and
Internal Timer Clock Active
Stop internal processor clock,
Clear I bit in CCR
reset?
Internal COP
reset?
External H/W
reset?
Internal
interrupt?
Restart internal
processor clock
1. Fetch reset vector
or
2. Service interrupt
a. Stack
b. Set I bit
c. Vector to interrupt routine
N
Y
TPG
86
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