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參數(shù)資料
| 型號(hào)： | MC68HC05BD5P |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 48/112頁 |
| 文件大?。?/td> | 676K |
| 代理商： | MC68HC05BD5P |
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MOTOROLA
4-8
MC68HC05BD3
RESETS AND INTERRUPTS
4
Then CPU needs to check the SRW bit and set its MTX bit accordingly. Writing to the M-Bus
Control register clears this bit.
MAL - Arbitration Lost
1 (set)
–
Lost arbitration in master mode.
0 (clear) –
No arbitration lost.
Refer to Section 7 for detailed description of M-Bus Interface.
4.2.2.4
Multi-Function Timer Interrupts
There are two interrupt sources, TOF and RTIF bits of Multi-Function Timer Control and Status
Register. The interrupt service routine address is specied by the contents of memory location
$3FF4 and $3FF5.
TOF - Timer Overow
1 (set)
–
8-bit ripple timer overow has occurred.
0 (clear) –
No 8-bit ripple timer overow has occurred.
This bit is set when the 8-bit ripple counter overows from $FF to $00; a timer overow interrupt
will occur, if TOFIE is set. TOF is cleared by writing a “0” to the bit.
RTIF - Real Time Interrupt Flag
1 (set)
–
A real time interrupt has occurred.
0 (clear) –
A real time interrupt has not occurred.
The clock frequency that drives the RTI circuit is E/16384, giving a maximum interrupt period of
8.19ms at a bus clock rate of 2MHz. A CPU interrupt request will be generated if RTIE is set. RTIF
is cleared by writing a “0” to the bit.
Refer to Section 5 for detailed description of Multi-Function Timer.
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
MFT Control and Status Register
$0008
TOF
RTIF
TOFIE
RTIE
IRQN
RT1
RT0
0000 0011
TPG
38
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