參數(shù)資料
型號: MC56F8357MPY60
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝: PLASTIC, LQFP-160
文件頁數(shù): 50/176頁
文件大?。?/td> 2230K
代理商: MC56F8357MPY60
Reset, Stop, Wait, Mode Select, and Interrupt Timing
56F8357 Technical Data, Rev. 9.0
Freescale Semiconductor
143
Preliminary
10.9 Reset, Stop, Wait, Mode Select, and Interrupt Timing
Table 10-17 Reset, Stop, Wait, Mode Select, and Interrupt Timing1,2
1. In the formulas, T = clock cycle. For an operating frequency of 60MHz, T = 16.67ns. At 8MHz (used during Reset and
Stop modes), T = 125ns.
2. Parameters listed are guaranteed by design.
Characteristic
Symbol
Typical
Min
Typical
Max
Unit
See Figure
RESET Assertion to Address, Data and
Control Signals High Impedance
tRAZ
—21
ns
Minimum RESET Assertion Duration
tRA
16T
ns
RESET Deassertion to First External Address
Output3
3. During Power-On Reset, it is possible to use the device’s internal reset stretching circuitry to extend this period to 221T.
tRDA
63T
64T
ns
Edge-sensitive Interrupt Request Width
tIRW
1.5T
ns
IRQA, IRQB Assertion to External Data
Memory Access Out Valid, caused by first
instruction execution in the interrupt service
routine
tIDM
18
ns
tIDM - FAST
14
IRQA, IRQB Assertion to General Purpose
Output Valid, caused by first instruction
execution in the interrupt service routine
tIG
18
ns
tIG - FAST
14
Delay from IRQA Assertion (exiting Wait) tto
External Data Memory Access4
4. The minimum is specified for the duration of an edge-sensitive IRQA interrupt required to recover from the Stop state.
This is not the minimum required so that the IRQA interrupt is accepted.
tIRI
22
ns
tIRI -FAST
18
Delay from IRQA Assertion to External Data
Memory Access (exiting Stop)
tIF
——
ns
tIF - FAST
IRQA Width Assertion to Recover from Stop
State5
5. The interrupt instruction fetch is visible on the pins only in Mode 3.
tIW
1.5T
ns
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