參數(shù)資料
型號: MC56F8357MPY60
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝: PLASTIC, LQFP-160
文件頁數(shù): 112/176頁
文件大?。?/td> 2230K
代理商: MC56F8357MPY60
56F8357 Technical Data, Rev. 9.0
40
Freescale Semiconductor
Preliminary
3.2.3
External Clock Source
The recommended method of connecting an external clock is given in Figure 3-4. The external clock
source is connected to XTAL and the EXTAL pin is grounded. When using an external clock source, set
the OCCS_COHL bit high as well.
Figure 3-4 Connecting an External Clock Signal
3.3 Registers
When referring to the register definitions for the OCCS in the 56F8300 Peripheral User Manual, use the
register definitions without the internal Relaxation Oscillator, since the 56F8357/56F8157 do NOT
contain this oscillator.
Part 4 Memory Map
4.1 Introduction
The 56F8357 and 56F8157 devices are 16-bit motor-control chips based on the 56800E core. These parts
use a Harvard-style architecture with two independent memory spaces for Data and Program. On-chip
RAM and Flash memory are used in both spaces.
This chapter provides memory maps for:
Program Address Space including the Interrupt Vector Table
Data Address Space including the EOnCE Memory and Peripheral Memory Maps
On-chip memory sizes for each device are summarized in Table 4-1. Flash memories’ restrictions are
identified in the “Use Restrictions” column of Table 4-1.
Note: Data Flash and Program RAM are NOT available on the 56F8157 device.
Table 4-1 Chip Memory Configurations
On-Chip Memory
56F8357
56F8157
Use Restrictions
Program Flash
256KB
Erase / Program via Flash interface unit and word writes to CDBW
Data Flash
8KB
Erase / Program via Flash interface unit and word writes to CDBW.
Data Flash can be read via one of CDBR or XDB2, but not both
simultaneously
Program RAM
4KB
None
Data RAM
16KB
None
Program Boot Flash
16KB
Erase / Program via Flash Interface unit and word to CDWB
XTAL
EXTAL
External
VSS
Clock
Note: When using an external clocking source with
this configuration, the input “CLKMODE” should be
high and the COHL bit in the OSCTL register
should be set to 1.
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