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參數(shù)資料
| 型號： | MC56F8323 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 16-bit Hybrid Controllers |
| 中文描述： | 16位混合控制器 |
| 文件頁數(shù)： | 43/140頁 |
| 文件大小： | 1981K |
| 代理商： | MC56F8323 |
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Electrical Design Considerations
56F8323 Technical Data, Rev. 11.0
Freescale Semiconductor
137
Preliminary
The thermal characterization parameter is measured per JESD51-2 specification using a 40-gauge type T
thermocouple epoxied to the top center of the package case. The thermocouple should be positioned so
that the thermocouple junction rests on the package. A small amount of epoxy is placed over the
thermocouple junction and over about 1mm of wire extending from the junction. The thermocouple wire
is placed flat against the package case to avoid measurement errors caused by cooling effects of the
thermocouple wire.
When heat sink is used, the junction temperature is determined from a thermocouple inserted at the
interface between the case of the package and the interface material. A clearance slot or hole is normally
required in the heat sink. Minimizing the size of the clearance is important to minimize the change in
thermal performance caused by removing part of the thermal interface to the heat sink. Because of the
experimental difficulties with this technique, many engineers measure the heat sink temperature and then
back-calculate the case temperature using a separate measurement of the thermal resistance of the
interface. From this case temperature, the junction temperature is determined from the junction-to-case
thermal resistance.
12.2 Electrical Design Considerations
Use the following list of considerations to assure correct operation of the 56F8323/56F8123:
Provide a low-impedance path from the board power supply to each VDD pin on the device, and from the
board ground to each VSS (GND) pin
The minimum bypass requirement is to place six 0.01–0.1
F capacitors positioned as close as possible to
the package supply pins. The recommended bypass configuration is to place one bypass capacitor on each
of the VDD/VSS pairs, including VDDA/VSSA. Ceramic and tantalum capacitors tend to provide better
performance tolerances.
Ensure that capacitor leads and associated printed circuit traces that connect to the chip VDD and VSS (GND)
pins are less than 0.5 inch per capacitor lead
Use at least a four-layer Printed Circuit Board (PCB) with two inner layers for VDD and VSS
Bypass the VDD and VSS layers of the PCB with approximately 100F, preferably with a high-grade
capacitor such as a tantalum capacitor
CAUTION
This device contains protective circuitry to guard
against damage due to high static voltage or electrical
fields. However, normal precautions are advised to
avoid
application
of
any
voltages
higher
than
maximum-rated voltages to this high-impedance circuit.
Reliability of operation is enhanced if unused inputs are
tied to an appropriate voltage level.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC56F8323EVM | 功能描述:開發(fā)板和工具包 - 其他處理器 MC56F832X Dev Kit RoHS:否 制造商:Freescale Semiconductor 產品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| MC56F8323EVM | 制造商:Freescale Semiconductor 功能描述:Tools Development kit Kit Con |
| MC56F8323EVME | 功能描述:開發(fā)板和工具包 - 其他處理器 MC56F8323 EVAL BRD RoHS:否 制造商:Freescale Semiconductor 產品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| MC56F8323EVME | 制造商:Freescale Semiconductor 功能描述:Evaluation Kit for MC56F832x and MC56F81 |
| MC56F8323MFB60 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
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