參數(shù)資料
型號: MC56F8322VFAE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 0-BIT, 120 MHz, OTHER DSP, PQFP48
封裝: ROHS COMPLIANT, LQFP-48
文件頁數(shù): 59/136頁
文件大?。?/td> 719K
代理商: MC56F8322VFAE
External Clock Operation
56F8322 Technical Data, Rev. 16
Freescale Semiconductor
29
Preliminary
3.2.2
Ceramic Resonator (Default)
It is also possible to drive the internal oscillator with a ceramic resonator, assuming the overall system
design can tolerate the reduced signal integrity. A typical ceramic resonator circuit is shown in Figure 3-2.
Refer to the supplier’s recommendations when selecting a ceramic resonator and associated components.
The resonator and components should be mounted as near as possible to the EXTAL and XTAL pins.
Figure 3-2 Connecting a Ceramic Resonator
Note:
The OCCS_COHL bit must be set to 0 when a crystal resonator is used. The reset condition on the
OCCS_COHL bit is 0. Please see the COHL bit in the Oscillator Control (OSCTL) register, discussed
in the 56F8300 Peripheral User Manual.
3.2.3
External Clock Source
The recommended method of connecting an external clock is illustrated in Figure 3-3. The external clock
source is connected to XTAL and the EXTAL pin is grounded.
Figure 3-3 Connecting an External Clock Register
EXTAL XTAL
Rz
Sample External Ceramic Resonator Parameters:
Rz = 750 KΩ
EXTAL XTAL
Rz
C1
CL1
CL2
C2
Resonator Frequency = 4 - 8MHz (optimized for 8MHz)
3 Terminal
2 Terminal
CLKMODE = 0
XTAL
EXTAL
External
VSS
Clock
Note: when using an external clocking
source with this configuration, the
CLKMODE and COHL bits
of the OSCTL register should be set to 1.
or GPIO
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