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參數(shù)資料
| 型號(hào)： | MC56603AGC60 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | 24-BIT, 60 MHz, OTHER DSP, PBGA144 |
| 封裝： | PLASTIC, BGA-144 |
| 文件頁數(shù)： | 46/97頁 |
| 文件大?。?/td> | 1080K |
| 代理商： | MC56603AGC60 |
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2-22
DSP56603A Technical Data Sheet
MOTOROLA
DSP56603A
AC Electrical Characteristics
Notes:
1.
See Host Port Usage Considerations on page 2-19.
2.
In the following timing diagrams (Figure 2-14 through Figure 2-18), the controls pins are drawn as
active low. Pin polarity is programmable.
3.
The Read Data Strobe is HRD in the Dual Data Strobe mode, HDS in the Single Data Strobe mode.
4.
This timing must be adhered to only if two consecutive reads from one of these registers are executed.
5.
The Last Data Register is the register at address $7, which is the last location to be read or written in
data transfers.
6.
The Write Data Strobe is HWR in the Dual Data Strobe mode, HDS in the Single Data Strobe mode.
7.
The Data Strobe is HRD or HWR in the Dual Data Strobe mode, HDS in the Single Data Strobe mode.
8.
These timings are periodically sampled and are not 100% tested.
9.
The Host Request is HREQ in the Single Host Request mode, HRRQ and HTRQ in the Double Host
Request mode.
10. In this calculation, the host request signal is pulled up by a 4.7 k
W resistor in the Open Drain mode.
Figure 2-14
Read Timing DiagramNon-Multiplexed Bus
Table 2-13
Host Interface Timing1, 2 (Continued)
Num
Characteristic
Symbol
Expression
60 MHz
Unit
Min
Max
HRD, HDS
HA0HA2
HCS
HAD0HAD7
HREQ
320
314
321
301
302
303
316
312
313
311
310
324
325
322
HRRQ
HTRQ
317
AA1266
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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