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參數(shù)資料
| 型號： | MBDF1200Z |
| 廠商： | Motorola, Inc. |
| 英文描述： | 3A,20V TMOS Dual N-Channel with Monolithic Zener ESD Protected Gate(3A,20V TMOS N溝道功率MOSFET（帶單片齊納ESD保護門）) |
| 中文描述： | 第3A，20V的TMOS是雙N溝道與單片ESD保護齊納門第（3A，20V的TMOS是?溝道功率MOSFET的（帶單片齊納的ESD保護門）） |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 187K |
| 代理商： | MBDF1200Z |
6
Motorola TMOS Power MOSFET Transistor Device Data
I
t, TIME
Figure 11. Reverse Recovery Time (trr)
di/dt = 300 A/
μ
s
Standard Cell Density
trr
High Cell Density
trr
tb
ta
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves de-
fine the maximum simultaneous drain–to–source voltage
and drain current that a transistor can handle safely when
it is forward biased. Curves are based upon maximum
peak junction temperature and a case temperature (TC)
of 25
°
C. Peak repetitive pulsed power limits are deter-
mined by using the thermal response data in conjunction
with the procedures discussed in AN569, “Transient
Thermal Resistance – General Data and Its Use.”
Switching between the off–state and the on–state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded, and that the
transition time (tr, tf) does not exceed 10
μ
s. In addition
the total power averaged over a complete switching cycle
must not exceed (TJ(MAX) – TC)/(R
θ
JC).
A power MOSFET designated E–FET can be safely
used in switching circuits with unclamped inductive
loads. For reliable operation, the stored energy from cir-
cuit inductance dissipated in the transistor while in ava-
lanche must be less than the rated limit and must be
adjusted for operating conditions differing from those
specified. Although industry practice is to rate in terms of
energy, avalanche energy capability is not a constant.
The energy rating decreases non–linearly with an in-
crease of peak current in avalanche and peak junction
temperature.
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
0.1
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
1
10
I
VGS = 4.5 V
SINGLE PULSE
TC = 25
°
C
10
0.1
10 ms
1
100
100
1 ms
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.01
100
μ
s
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