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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | MB95F136JBWPF-GE1 |
| 寤犲晢锛� | Fujitsu Semiconductor America Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 19/64闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MCU 32KB FLASH 28SOP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 绯诲垪锛� | F²MC MB95130MB |
| 鏍稿績铏曠悊鍣細 | F²MC-8FX |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 16MHz |
| 閫ｉ€氭€э細 | LIN锛孲IO锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | LVD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 19 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 32KB锛�32K x 8锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 1K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 2.4 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 8x8/10b |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | -40°C ~ 105°C |
| 灏佽/澶栨锛� | 28-SOP |
| 鍖呰锛� | 绠′欢 |
| 鍏跺畠鍚嶇ū锛� | 865-1075 |
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MB95130MB Series
26
(Continued)
Address
Register
abbreviation
Register name
R/W
Initial value
0FA4H
PPGS
8/16-bit PPG start register
R/W
00000000B
0FA5H
REVC
8/16-bit PPG output inversion register
R/W
00000000B
0FA6H
to
0FA9H
(Disabled)
0FAAH
PDCRH0
16-bit PPG down counter register (Upper byte) ch.0
R
00000000B
0FABH
PDCRL0
16-bit PPG down counter register (Lower byte) ch.0
R
00000000B
0FACH
PCSRH0
16-bit PPG cycle setting buffer register (Upper byte) ch.0
R/W
11111111B
0FADH
PCSRL0
16-bit PPG cycle setting buffer register (Lower byte) ch.0
R/W
11111111B
0FAEH
PDUTH0
16-bit PPG duty setting buffer register (Upper byte) ch.0
R/W
11111111B
0FAFH
PDUTL0
16-bit PPG duty setting buffer register (Lower byte) ch.0
R/W
11111111B
0FB0H
to
0FBBH
(Disabled)
0FBCH
BGR1
LIN-UART baud rate generator register 1
R/W
00000000B
0FBDH
BGR0
LIN-UART baud rate generator register 0
R/W
00000000B
0FBEH
PSSR0
UART/SIO dedicated baud rate generator
prescaler selection register ch.0
R/W
00000000B
0FBFH
BRSR0
UART/SIO dedicated baud rate generator
baud rate setting register ch.0
R/W
00000000B
0FC0H
to
0FC2H
(Disabled)
0FC3H
AIDRL
A/D input disable register (Lower byte)
R/W
00000000B
0FC4H
to
0FE2H
(Disabled)
0FE3H
WCDR
Watch counter data register
R/W
00111111B
0FE4H
to
0FE6H
(Disabled)
0FE7H
ILSR2
Input level select register 2 (option)
R/W
00000000B
0FE8H,
0FE9H
(Disabled)
0FEAH
CSVCR
Clock supervisor control register
R/W
00011100B
0FEBH
to
0FEDH
(Disabled)
0FEEH
ILSR
Input level select register
R/W
00000000B
0FEFH
WICR
Interrupt pin control register
R/W
01000000B
0FF0H
to
0FFFH
(Disabled)
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| MB95F136JBWPFV | 鍒堕€犲晢:FUJITSU 鍒堕€犲晢鍏ㄧū:Fujitsu Component Limited. 鍔熻兘鎻忚堪:8-bit Microcontrollers |
| MB95F136JS | 鍒堕€犲晢:FUJITSU 鍒堕€犲晢鍏ㄧū:Fujitsu Component Limited. 鍔熻兘鎻忚堪:8-bit Proprietary Microcontrollers |
| MB95F136JSPFV-GE1 | 鍒堕€犲晢:FUJITSU 鍔熻兘鎻忚堪:8BIT MCU 32K FLASH 1K RAM SOP28 |
| MB95F136JW | 鍒堕€犲晢:FUJITSU 鍒堕€犲晢鍏ㄧū:Fujitsu Component Limited. 鍔熻兘鎻忚堪:8-bit Proprietary Microcontrollers |
| MB95F136KSPF-GE1 | 鍒堕€犲晢:FUJITSU 鍔熻兘鎻忚堪: |
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