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參數(shù)資料
| 型號： | MB90246APFV |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 68/100頁 |
| 文件大小： | 1959K |
| 代理商： | MB90246APFV |
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7
MB90246A Series
s PIN DESCRIPTION
Pin no.
Pin name
Circuit
type
Function
LQFP*
80
X0
A
This is a crystal oscillator pin.
81
X1
47 to 49
MD0 to MD2
C
This is an input pin for selecting operation modes.
Connect directly to VCC or VSS.
75
RST
B
This is external reset request signal.
50
HST
C
This is a hardware stand-by input pin.
91 to 98
P10 to P17
D
This is a general-purpose I/O port.
This function is valid in the 8-bit mode where the external bus is
valid.
D08 to D15
This is an I/O pin for the upper 8-bit of the external address data
bus.
This function is valid in the 16-bit mode where the external bus is
valid.
16 to 20,
22 to 24
P40 to P44,
P45 to P47
E
This is a general-purpose I/O port.
This function becomes valid in the bit where the upper address
control register is set to select a port.
A16 to A20,
A21 to A23
This is an output pin for the upper 8-bit of the external address bus.
This function is valid in the mode where the external bus is valid
and the upper address control register is set to select an address.
70
P50
E
This is a general-purpose I/O port.
This function becomes valid when the CLK output is disabled.
CLK
This is a CLK output pin.
This function becomes valid when CLK output is enabled.
71
P51
D
This is a general-purpose I/O port.
This function becomes valid when the external ready function are
disabled.
RDY
This is a ready input pin.
This function becomes valid when the external ready function is
enabled.
72
P52
D
This is a general-purpose I/O port.
This function becomes valid when the hold function are disabled.
HAK
This is a hold acknowledge output pin.
This function becomes valid when the hold function is enabled.
73
P53
D
This is a general-purpose I/O port.
This function becomes valid when the hold function are disabled.
HRQ
This is a hold request input pin.
This function becomes valid when the hold function is enabled.
74
P54
E
This is a general-purpose I/O port.
This function becomes valid, in the external bus 8-bit mode, or
WRH pin output is disabled.
WRH
This is a write strobe output pin for the upper 8-bit of the data bus.
This function becomes valid when the external bus 16-bit mode is
selected, and WRH output pin is enabled.
* : FPT-100P-M05
(Continued)
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相關代理商/技術參數(shù) |
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