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參數(shù)資料
| 型號： | MB90246APFV |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 31/100頁 |
| 文件大?。?/td> | 1959K |
| 代理商： | MB90246APFV |
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36
MB90246A Series
5. 16-bit Re-load Timer
The 16-bit re-load timer has an internal clock mode for counting down in synchronization to three types of internal
clocks and an event count mode for counting down detecting a given edge of the pulse input to the external bus
pin, and either of the two functions can be selectively used.
For this timer, an “underflow” is defined as the timing of transition from the counter value of “0000H” to “FFFFH”.
According to this definition, an underflow occurs after [re-load register setting value + 1] counts.
In operating the counter, the re-load mode for repeating counting operation after re-loading a counter value after
an underflow or the one-shot mode for stopping the counting operation after an underflow can be selectively used.
Because the timer can generate an interrupt upon an underflow, the timer conforms to the extended intelligent
I/O service (EI2OS).
The MB90246A series has 3 channels of 16-bit re-load timers.
(1) Register Configuration
Initial value
XXXXXXXXB
bit 7
bit 0
Timer control status register 0, 1, 2 upper digits (TMCSR0, TMCSR1, TMCSR2: H)
Address
TMCSR0 : 000041H
TMCSR1 : 000049H
TMCSR2 : 000051H
—
CSL1
CSL0 MOD2 MOD1
(TMCSR : L)
——
—
R/W
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
.............
Initial value
---- 0000 B
bit 15
bit 8
Timer control status register 0, 1, 2 lower digits (TMCSR0, TMCSR1, TMCSR2: L)
Address
TMCSR0 : 000040H
TMCSR1 : 000048H
TMCSR2 : 000050H
OUTE
MOD0
(TMCSR : H)
R/W
bit 7
bit 6
bit 5
bit 4
Initial value
00000000 B
RELD
OUTL
UF
INTE
TRG
CNTE
.............
bit 3
bit 2
bit 1
bit 0
16-bit timer register 0, 1 (TMR0, TMR1, TMR2)
Address
bit 15
Initial value
XXXXXXXXB
bit 14bit 13bit 12bit 11bit 10 bit 9 bit 8 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
RRRR
R
RR
R
RRRR
R
RRR
16-bit re-load register 0, 1 (TMRL0,TMRL1)
Address
bit 15bit 14bit 13bit 12bit 11bit 10 bit 9 bit 8 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
WWWW
WWW
W
WWW
WWWW
R/W : Readable and writable
R : Read only
W : Write only
— : Unused
X : Indeterminate
TMR0 : 000042H
TMR1 : 00004AH
TMR2 : 000052H
D15 D14 D13 D12 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
TMRLR0 : 000044H
TMRLR1 : 00004CH
TMRLR2 : 000054H
D15 D14 D13 D12 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
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