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參數(shù)資料
| 型號： | MAX5816ATB+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 8/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT SRL 4CH 10TDFN |
| 產(chǎn)品培訓(xùn)模塊： | Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 設(shè)置時間： | 4.5µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 1.95W |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 10-TDFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電壓，單極 |
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Ultra-Small, Quad-Channel, 12-Bit Buffered Output DAC
with Internal Reference and I2C Interface
MAX5816
Maxim Integrated Products 16
I2C Broadcast Address
A broadcast address is provided for the purpose of
updating or configuring all MAX5816 devices on a
given I2C bus. All MAX5816 devices acknowledge and
respond to the broadcast device address 00010000. The
devices will respond to the broadcast address, regard-
less of the state of the address pins. The broadcast mode
is intended for use in write mode only (as indicated by
R/W = 0 in the address given).
I2C Acknowledge
In write mode, the acknowledge bit (ACK) is a clocked
9th bit that the MAX5816 uses to handshake receipt of
each byte of data as shown in Figure 3. The MAX5816
pulls down SDA during the entire master-generated 9th
clock pulse if the previous byte is successfully received.
Monitoring ACK allows for detection of unsuccessful data
transfers. An unsuccessful data transfer occurs if a receiv-
ing device is busy or if a system fault has occurred. In the
event of an unsuccessful data transfer, the bus master will
retry communication.
In read mode, the master pulls down SDA during the 9th
clock cycle to acknowledge receipt of data when the
MAX5816 is in read mode. An acknowledge is sent by the
master after each read byte to allow data transfer to con-
tinue. A not-acknowledge is sent when the master reads
the final byte of data from the MAX5816, followed by a
STOP condition.
I2C Command Byte and Data Bytes
A command byte follows the slave address. A command
byte is typically followed by two data bytes unless it is
the last byte in the transmission. If data bytes follow the
of the register that is to receive the following two data
bytes. The data bytes are stored in a temporary register
and then transferred to the appropriate register during
the ACK periods between bytes. This avoids any glitch-
ing or digital feedthrough to the DACs while the interface
is active.
I2C Write Operations (Standard Protocol)
A master device communicates with the MAX5816
by transmitting the proper slave address followed by
command and data words. Each transmit sequence
is framed by a START or Repeated START condi-
tion and a STOP condition as described above. Each
word is 8 bits long and is always followed by an
acknowledge clock (ACK) pulse as shown in the
address of the MAX5816 with R/W = 0 to indicate a
write. The second byte contains the command (or
register) to be written and the third and fourth bytes
contain the data to be written. By repeating the com-
mand plus data byte pairs (Byte #2 through Byte #4 in
command writes using a single I2C write sequence.
There is no limit as to how many commands the user can
execute with a single write sequence. The MAX5816 sup-
ports this capability for all user-accessible write mode
commands.
Figure 3. I2C Acknowledge
Figure 4. I2C Single Register Write Sequence
1
SCL
START
CONDITION
SDA
29
CLOCK PULSE
FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
SCL
A
20 19 18 17
A
16
15 14 13 12 11 10 9A
8
START
SDA
WRITE ADDRESS
BYTE #1: I2C SLAVE ADDRESS
WRITE COMMAND
BYTE #2: COMMAND BYTE
(B[23:16])
WRITE DATA
BYTE #3: DATA HIGH BYTE
(B[15:8])
WRITE DATA
BYTE #4: DATA LOW BYTE
(B[7:0])
21
22
23
STOP
7 6 5 4 3 2 1
A
0
ACK. GENERATED BY MAX5816
COMMAND EXECUTED
1 1
A
A1 A0 W
0
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