SPI/I2C UART with 128-Word FIFOs DIV can be a maximum of 16 bits wide and is pro" />
參數(shù)資料
型號: MAX3107ETG+T
廠商: Maxim Integrated Products
文件頁數(shù): 10/52頁
文件大?。?/td> 0K
描述: IC UART SPI/I2C 128 FIFO 24TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
特點(diǎn): 內(nèi)部振蕩器
通道數(shù): 4,QUART
FIFO's: 128 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 2.35 V ~ 3.6 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
安裝類型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-TQFN-EP(3.5x3.5)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: MAX3107ETG+TDKR
SPI/I2C UART with 128-Word FIFOs
DIV can be a maximum of 16 bits wide and is pro-
grammed into the 2-byte-wide registers DIVMSB and
DIVLSB. The minimum allowed for DIVLSB is 1.
The fractional portion of the divisor, FRACT, is a 4-bit
nibble, which is programmed into BRGConfig[3:0]. The
maximum value is 15, allowing the divisor to be pro-
grammed with a resolution of 0.0625. FRACT is calcu-
lated as:
FRACT = ROUND(16 x (D-DIV))
The following is an example of calculating the divisor.
It is based on a required baud rate of 190kbaud and a
reference input frequency of 28.23MHz and 1x (default)
rate mode.
The ideal divisor is calculated as:
D = 28,230,000/(16 x 190,000)
= 9.2861842105263157894736842105263
hence DIV = 9.
FRACT =
ROUND(4.5789473684210526315789473684211) = 5
so that DIVMSB = 0x00, DIVLSB = 0x09, and
BRGConfig[3:0] = 0x05.
The resulting (actual) baud rate can be calculated as:
REF
ACTUAL
f
BR
16 D
=
×
For this example: DACTUAL = 9 + 5/16 = 9.3125
where
DACTUAL = DIV + FRACT/16
and
BRACTUAL= 28,230,000/(16 x 9.3125)
= 189463.0872483221476510067114094 baud
Thus, the baud rate is within 0.28% of the ideal rate.
2x and 4x Rate Modes
To support higher baud rates than possible with stan-
dard (16x sampling) operation, the MAX3107 offers 2x
and 4x rate modes. In this case, the reference clock rate
only needs to be either 8x or 4x of the baud rate, respec-
tively. The bits are only sampled once at the midbit
instant instead of the usual three samples to determine
the logic value of the bits. This reduces the tolerance to
line noise on the received data. The 2x and 4x modes
are selectable through BRGConfig[5:4]. Note that IrDA
encoding and decoding does not operate in 2x and 4x
modes.
When 2x rate mode is selected, the actual baud rate is
twice the rate programmed into the baud-rate genera-
tor. If 4x rate mode is enabled, the actual baud rate on
the line is quadruple that of programmed baud rate
(Figure 8).
Figure 8. 2x and 4x Baud Rates
FRACTIONAL
RATE
GENERATOR
fREF
BAUD RATE
BaudRateConfig[5:4]
DIV[LSB]
DIV[MSB]
NOTE: IrDA DOES NOT WORK IN 2x AND 4x MODES.
FRACT
1x, 2x, 4x RATE
MODES
18
Maxim Integrated
MAX3107
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