參數(shù)資料
型號： MAX19527EVKIT+
廠商： Maxim Integrated Products
文件頁數(shù)： 14/30頁
文件大?。?/td> 0K
描述： EVAL KIT MAX19527
標準包裝： 1
系列： *
Ultra-Low-Power, Octal, 12-Bit, 50Msps,
1.8V ADC with Serial LVDS Outputs
MAX19527
21
The LVDS data output format can be adjusted using
the DATA_FORMAT bit (01h[1]) and the BIT_ORDER bit
(01h[0]). The default state for both is logic 0, correspond-
ing to a binary digital output code, presented LSB first.
Setting BIT_ORDER to logic 1 changes the LVDS output
data to an MSB-first format. Setting DATA_FORMAT to
logic 1 changes the LVDS output format from binary to
two’s complement. Table 6 contains the LVDS output
data format programming details.
The phase of the serial LVDS output clock (CLKOUT) can
be adjusted, relative to the output data frame, by using
the CLKOUT_PHASE[1:0] bits (01h[3:2]). The default
state for CLKOUT_PHASE[1:0] is 00, and by changing
this value the default phase relationship can be adjusted
in 90N increments. Figure 10 illustrates both the default
phase relationship (between an output data frame and
the output clock), as well as the other three settings
(shown with the default LSB first output data format).
The serial LVDS outputs also feature programmable
test patterns for data timing alignment. By default,
the TEST_DATA bit (01h[4]) is set to logic 0, enabling
normal channel data outputs. By setting TEST_DATA
to logic 1, test data output patterns are enabled. The
ADC has five preset test data output settings, as well
as one custom pattern setting (custom test patterns are
programmed through registers 07h, 08h, and 09h). The
TEST_PATTERN[2:0] bits (01h[7:5]) are used to select
the type of output test pattern. All test patterns consist of
a sequence of one or more 12-bit data frames. Table 7
contains the test pattern programming details.
Pseudo-random data patterns are bit sequences with-
out regard to bit position within the frame. The short
sequence repeats every 29 - 1 (511) bits. The bit
sequence is generated according to the ITU-T 0.150
standard, with an initial value shown in Table 8. The long
sequence repeats every 223 - 1 (8,388,607) bits accord-
ing to ITU-T 0.150 with an initial value shown in Table 8
and an inverted bit stream.
Table 4. Power-Management Programming Table
Table 5. Output Data Format and Test Pattern (01h)
Table 6. LVDS Output Data Format Programming
X = Don’t care.
SHDN
NAP_SHDN0
00h[0]
CHx_SHDN0
05h[7:0]
NAP_SHDN1
00h[1]
CHx_SHDN1
06h[7:0]
MAX19527 STATE
0
0000-0000
X
XXXX-XXXX
Sleep mode
0
1
0000-0000
X
XXXX-XXXX
Nap mode
0
X
One or more bits set to 1
X
XXXX-XXXX
Active mode
1
X
XXXX-XXXX
0
0000-0000
Sleep mode
1
X
XXXX-XXXX
1
0000-0000
Nap mode
1
X
XXXX-XXXX
X
One or more bits set to 1
Active mode
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
TEST_PATTERN[2:0]
TEST_DATA
CLKOUT_PHASE[1:0]
DATA_FORMAT
BIT_ORDER
DATA_FORMAT
BIT_ORDER
LVDS OUTPUT DATA FORMAT
0
Binary, LSB first (default)
0
1
Binary, MSB first
1
0
Two’s complement, LSB first
1
Two’s complement, MSB first
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相關代理商/技術參數(shù)
參數(shù)描述
MAX19527EVKIT+ 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX19527 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
MAX19527EXE+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12Bit 8Ch 50Msps 1.8V ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX19527EXE+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12Bit 8Ch 50Msps 1.8V ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX19528EVKIT+ 制造商:Maxim Integrated Products 功能描述:ANALOG TO DIGITAL CONVERTER - Boxed Product (Development Kits)
MAX19528EXE+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Integrated Circuits (ICs) Analog to Digital Converters - IC ADC 12BIT 8CH 64MSPS 144CTBGA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
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