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參數(shù)資料
型號: MAX13326GUI/V+T
廠商: Maxim Integrated Products
文件頁數(shù): 4/21頁
文件大?。?/td> 0K
描述: IC AUD LINE DVR DL AUTO 28TSSOP
其它有關(guān)文件: Automotive Product Guide
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: 線路驅(qū)動器,發(fā)射器
應(yīng)用: 車載音頻
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.173",4.40mm 寬)裸露焊盤
供應(yīng)商設(shè)備封裝: 28-TSSOP 裸露焊盤
包裝: 帶卷 (TR)
12
Maxim Integrated
Dual Automotive, Audio Line Drivers
with I2C Control and Diagnostic
MAX13325/MAX13326
FLAG Register
FLAG: FLAG bit is set to ‘1’ when the FLAG output is logic-low. The FLAG bit allows to quickly access the status of the
device without using the FLAG output and without having to read all the fault registers.
LHIGHZ: The LHIGHZ bit is set to ‘1’ when the left-channel output is high impedance; for example due to a short circuit.
RHIGHZ: The RHIGHZ bit is set to ‘1’ when the right-channel output is high impedance; for example due to a short
circuit.
OFFSETL: The OFFSETL bit is set to ‘1’ when excessive offset is detected on the left-channel output.
OFFSETR: The OFFSETR bit is set to ‘1’ when excessive offset is detected on the right-channel output.
ID[2:0]: The ID[2:0] bits indicate the device type (12dB = 100 and 0dB = 101).
General Mask Register
MTWARN: Set MTWARN to ‘1’ to enable the TWARN fault detection. See Table 4.
MTSHDN: Set MTSHDN to ‘1’ to enable the TSHDN fault detection. See Table 4.
MDUMP: Set MDUMP to ‘1’ to enable the DUMP fault detection. See Table 4.
Left-Channel Mask Register
MSVDDL: Set MSVDDL to 1 to enable the short to VDD detection on the left channel.
MSGNDL: Set MSGNDL to 1 to enable the short to GND detection on the left channel.
MLIMITL: Set MLIMITL to 1 to enable overcurrent detection on the left channel.
MOFFSETL: Set MOFFSETL to 1 to enable excessive-offset detection on the left-channel output.
MOPENL: Set MOPENL to 1 to enable open-load detection on the left channel.
Table 8. General Mask Register Format
Table 9. Left-Channel Mask Register
Table 7. Flag Register Format
FUNCTION
ADDRESS
CODE
(HEX)
REGISTER DATA
POR STATE
(HEX)
D7
D6
D5
D4
D3
D2
D1
D0
General Mask
Register
0x06
0
MTWARN
MTSHDN
MDUMP
x
0x00
FUNCTION
ADDRESS
CODE
(HEX)
REGISTER DATA
POR
STATE
(HEX)
D7
D6
D5
D4
D3
D2
D1
D0
Left-Channel
Mask Register
0x07
MSVDDL
MSGNDL
MLIMITL
0
MOFFSETL
MOPENL
x
0x00
FUNCTION
ADDRESS
CODE
(HEX)
REGISTER DATA
POR STATE
(HEX)
D7
D6
D5
D4
D3
D2
D1
D0
FLAG
Register
0x05
FLAG
LHIGHZ
RHIGHZ
OFFSETL
OFFSETR
ID2
ID1
ID0
0x04/0x05
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