
5
Maxim Integrated
Dual Automotive, Audio Line Drivers
with I2C Control and Diagnostic
MAX13325/MAX13326
DIGITAL CHARACTERISTICS
(VDD = 14.4V, VL = 3.3V, TA = TJ = -40NC to +105NC, typical values are TA = +25NC, unless otherwise noted.) (Note 2)
Note 2: All devices are 100% tested at TA = +25NC. Limits over temperature are guaranteed by design.
Note 3: Signal path gain is defined as:
Note 3: Signal Path Gain is defined as
_
OUT_
IN_
IN
(V
) (V
)
20 log
.
(V
) (V
)
+
+
×
Note 4: Measured in differential output mode, differential input voltage 4VP-P (for 0dB gain), 1VP-P (for 12dB gain) 1kHz.
Common-mode output balance is defined as:
Common-Mode Output Balance is defined as
_
OUT_
OUT
(| V
) ( V
)
20 log
.
( V
) (V
) 2
+
×
+×
Note 5: 22Hz to 22kHz measurement bandwidth.
Note 6: KCP level is calculated as 20log[(peak voltage during mode transition, no input signal)/1VRMS]. Units are expressed in
dBV.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INTERFACE
Input-Voltage High
VINH
VL = 2.7V to 5.5V
0.75 x VL
V
Input-Voltage Low
VINL
VL = 2.7V to 5.5V
0.25 x VL
V
Input-Voltage Hysteresis
50
mV
Input Leakage Current
Q
100
F
A
Output Low Voltage
FLAG, SDA, ISINK = 3mA
0.4
V
Output Leakage Current
FLAG, SDA = 5.5V
2
F
A
Stand-Alone FLAG Pulse Width
ADD0, ADD1 = GND
100
ms
Stand-Alone Fault Retry Time
ADD0, ADD1 = GND
500
ms
I2C TIMING
Serial-Clock Frequency
fSCL
0
400
kHz
Bus Free Time
tBUF
Between START and STOP conditions
1.3
F
s
Hold Time
tHD:STA
Repeated START condition
0.6
F
s
SCL Low Time
tLOW
1.3
F
s
SCL High Time
tHIGH
0.6
F
s
Data Hold Time
tHD:DAT
0
900
ns
Data Setup Time
tSU:DAT
100
ns
Bus Capacitance
CB
Per bus line
400
pF
Receiving Rise Time
tR
SCL, SDA
20 + 0.1CB
300
ns
Receiving Fall Time
tF
SCL, SDA
20 + 0.1CB
300
ns
Transmitting Fall Time
tF
SDA, VL = 3.6V
20 + 0.05CB
250
ns
STOP Condition Setup Time
tSU:STO
0.6
F
s
Pulse Width of Suppressed Spike
tSP
0
50
ns