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參數(shù)資料
| 型號： | M66291GP |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 108/128頁 |
| 文件大?。?/td> | 928K |
| 代理商： | M66291GP |
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M66291GP/HP
Rev 1.01 2004.11.01 page 78 of 122
(6) EPi_RWMD (Continuous Transmit/Receive Mode) Bit (b6)
This bit sets the transmit/receive mode at bulk transfer.
This bit can be set to “1” only when the transfer type is set to bulk transfer (EPi_TYP bits = “01”).
Set to “0” for other transfer modes.
When set to OUT buffer (EPi_DIR bit = “0”)
In case of single transmit/receive mode, the receive completes after receiving one packet under the
conditions as follows:
Receives the data equivalent to the size set by the EPi_MXPS bits.
Receives the short packet (including the zero-length packet).
In case of continuous transmit/receive mode, the receive completes after receiving several packets
under the conditions as follows:
Receives automatically the data equivalent to the size set by the EPi_MXPS bits several
times and receives the data equivalent to the byte set by the EPi_Buf_siz bit.
Receives the short packet (including the zero-length packet).
When the value set by the DMAn_Transaction Count Register conforms to the packet
receiving count.
When set to IN buffer (EPi_DIR bit = “1”)
In case of single transmit/receive mode, the transmit completes after transmitting one packet under
the conditions as follows:
Transmits the data equivalent to the size set by the EPi_MXPS bits or the zero-length
packet.
In case of continuous transmit/receive mode, the transmit completes after transmitting several packets
under the conditions as follows:
Transmits automatically the data equivalent to the size set by the EPi_MXPS bits several
times and transmits the data equivalent to the byte set by the EPi_Buf_siz bit.
In case of single transmit/receive mode, the write completes under the conditions as follows:
Writes the data equivalent to the size set by the EPi_MXPS bits to the buffer (IVAL bit
changed to “1”).
Writes “1” to the IVAL bit of the CPU_FIFO Control/Dn_FIFO Control Register.
In case of continuous transmit/receive mode, the write completes under the conditions as follows:
Writes the data equivalent to the size set by the EPi_Buf_siz bit to the buffer (IVAL bit
changed to “1”).
Writes “1” to the IVAL bit.
The set/clear conditions of the IVAL bit change according to this bit.
(7) EPi_Buf_Nmb (Buffer Start Number) Bits (b5~b0)
These bits set the beginning block number of the buffer.
The block number is a number by dividing the FIFO buffer into 64 byte sections (Note 1).
The domain set by the EPi_Buf_siz bit from the block set by these bits is secured as the buffer (Note 2).
Note 1: The M66291 is equipped with 3 Kbytes FIFO buffer and has the blocks from H’0 to H’2F.
Note 2: Make sure that several endpoints may not get overlapped in the same buffer area.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66291GP#201 | 制造商:Renesas Electronics Corporation 功能描述:IC ASSP USB2.0 DEVICE CONTROLLER 48LQFP |
| M66291GP#RB0S | 功能描述:IC USB CONTROLLER GEN-PUR 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| M66291GPRB0S | 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Device Controller,LQFP48 |
| M66291HP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:ASSP (USB2.0 Device Controller) |
| M66291HP#200D | 功能描述:IC USB CONTROLLER GEN-PUR 52VQFN RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
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