
CENTRAL PROCESSING UNIT (CPU)
7702/7703 Group User’s Manual
2–23
2.5 Processor modes
Fig. 2.5.2 Pin configuration in each processor mode (top view)
P8
4
/C
T
S
1
/R
T
S
1
P8
5
/CLK
1
P8
6
/R
X
D
1
P8
7
/T
X
D
1
P7
0
/A
N
0
P6
7
/T
B
2
IN
P6
6
/T
B
1
IN
P6
5
/T
B
0
IN
P6
4
/IN
T
2
P6
3
/IN
T
1
P6
2/IN
T
0
P6
1
/T
A
4
IN
P6
0
/T
A
4
OU
T
P5
7
/T
A
3
IN
P5
6
/T
A
3
OU
T
P5
5
/T
A
2
IN
P5
4
/T
A
2
OU
T
P5
3
/T
A
1
IN
P5
2
/T
A
1
OU
T
P5
1
/T
A
0
IN
P5
0
/T
A
0
OU
T
25
27
26
28
34
29
30
31
32
33
35
36
37
38
39
40
14
3
25
P24
P25
P26
P27
P30
P31
P32
P33
Vss
E
XOUT
XIN
R ESET
CNVSS V1
BYTE
P40
P83/TXD 0
P82/RXD 0
P81/C LK0
P80/C TS0/R TS0
VCC
AVCC
VREF
AVSS
VSS
P77/AN7/ADTRG
P76 /AN6
P75 /AN5
P74 /AN4
P73 /AN3
P72 /AN2
P71 /AN1
6
7
8
9
10 11 12 13 14 15 16
17 18 19 20 21
64 63 62
61 60 59 58 57 56 55 54 53 52
51 50 49 48 47 46 45 44
80
79
78
77
76
75
74
73
72
71
69
68
67
66
65
70
P1
3
P1
4
P1
5
P1
6
P1
7
P2
0
P2
1
P2
2
P2
3
43 42
41
M37702M2BXXXFP
22 23
24
P4
1
P4
7
P4
6
P4
5
P4
4
P4
3
P4
2
/
1
P0
0
P0
1
P0
2
P0
3
P0
4
P0
5
P0
6
P0
7
P1
0
P1
1
P1
2
P7
0
/AN
0
P6
7
/TB
2
IN
P6
6
/TB
1
IN
P6
5
/TB
0
IN
P6
4
/IN
T
2
P6
3
/IN
T
1
P6
2
/IN
T
0
P6
1
/T
A
4
IN
P6
0
/T
A
4
OU
T
P5
7
/T
A
3
IN
P5
6
/T
A
3
OU
T
P5
5
/T
A
2
IN
P5
4
/T
A
2
OU
T
P5
3
/T
A
1
IN
P5
2
/T
A
1
OU
T
P5
1
/T
A
0
IN
P5
0
/T
A
0
OU
T
25
27
26
28
34
29
30
31
32
33
35
36
37
38
39
40
1
4
3
2
5
A20/D4
A21/D5
A22/D6
A23/D7
R/W
BH E
ALE
HLDA
Vss
E
XOUT
XIN
R ESET
CNVSS
BYTE
HO LD
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44
80
79
78
77
76
75
74
73
72
71
69
68
67
66
65
70
A
11
/D
11
A
12
/D
12
A
13
/D
13
A
14
/D
14
A
15
/D
15
A
16
/D
0
A
17
/D
1
A
18
/D
2
A
19
/D
3
43 42
41
M37702M2BXXXFP
22 23 24
RDY
P4
7
P4
6
P4
5
P4
4
P4
3
V
2
P4
2
/
1
P8
4
/C
T
S
1
/R
T
S
1
P8
5
/C
L
K
1
P8
6
/R
X
D
1
P8
7
/T
X
D
1
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
/D
8
A
9
/D
9
A
10
/D
10
P83/TXD0
P82/RXD0
P81/C LK0
P80/C TS0/R TS0
VCC
AVCC
VREF
AVSS
VSS
P77/AN7/ADTRG
P76/AN6
P75/AN5
P74/AN4
P73/AN3
P72/AN2
P71/AN1
V1 Connect these pins to Vss pin in the single-chip
mode.
: These pins have different functions between the
single-chip and the memory expansion/micropro-
cessor modes.
V2 This pin functions as
1
in the microprocessor
mode.
: These pins have different functions between the
single-chip and the memory expansion/micropro-
cessor modes.
qMemory expansion/Microprocessor mode
qSingle-chip mode