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| 型號： | M3720-1 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 1 KEY 1 SOUND |
| 中文描述： | 1鍵1聲 |
| 文件頁數(shù)： | 79/121頁 |
| 文件大小： | 1907K |
| 代理商： | M3720-1 |
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MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
79
ADDRESSING MODE
The memory access is reinforced with 17 kinds of addressing modes.
Refer to SERIES 740 <Software> User’s Manual for details.
MACHINE INSTRUCTIONS
There are 71 machine instructions. Refer to SERIES 740 <Soft- ware>
User’s Manual for details.
PROGRAMMING NOTES
(1) The divide ratio of the timer is 1/(n+1).
(2) Even though the BBC and BBS instructions are executed imme-
diately after the interrupt request bits are modified (by the pro-
gram), those instructions are only valid for the contents before
the modification. At least one instruction cycle is needed (such as
an NOP) between the modification of the interrupt request bits
and the execution of the BBC and BBS instructions.
(3) After the ADC and SBC instructions are executed (in the decimal
mode), one instruction cycle (such as an NOP) is needed before
the SEC, CLC, or CLD instruction is executed.
(4) An NOP instruction is needed immediately after the execution of
a PLP instruction.
(5) In order to avoid noise and latch-up, connect a bypass capacitor
(
≈
0.1
μ
F) directly between the V
CC
pin–V
SS
pin and the V
CC
pin–
CNV
SS
pin, using a thick wire.
AUTO-CLEAR CIRCUIT
When a power source is supplied, the auto-clear function will oper-
ate by connecting the following circuit to the RESET pin.
Fig. 81. Auto-clear Circuit Example
Fig. 80. Display Oscillation Circuit
DISPLAY OSCILLATION CIRCUIT
The CRT display clock oscillation circuit has a built-in clock oscilla-
tion circuits, so that a clock for CRT display can be obtained simply
by connecting an LC, an RC, a quartz-crystal oscillator or a ceramic
resonator across the pins OSC1 and OSC2. Which of the sub-clock
or the display oscillation circuit is selected by setting bits 0 and 1 of
the CRT clock selection register (address 0209
16
).
OSC2
OSC1
L
C1
C2
RESET
Vss
Vcc
Circuit example 1
RESET
Vss
Vcc
Circuit example 2
Note :
Make the level change from LOW to HIGH at the point at
which the power source voltage exceeds the specified
voltage.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M3720-10 | 1 KEY 1 SOUND |
| M3720-2 | 1 KEY 1 SOUND |
| M3720-3 | 1 KEY 1 SOUND |
| M3720-4 | 1 KEY 1 SOUND |
| M3720-5 | 26604060VOID34 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M3720-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1 KEY 1 SOUND |
| M3720-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1 KEY 1 SOUND |
| M3720-3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1 KEY 1 SOUND |
| M3720-4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1 KEY 1 SOUND |
| M3720-5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1 KEY 1 SOUND |
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