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| 型號(hào)： | M3720-1 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 1 KEY 1 SOUND |
| 中文描述： | 1鍵1聲 |
| 文件頁(yè)數(shù)： | 74/121頁(yè) |
| 文件大小： | 1907K |
| 代理商： | M3720-1 |
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MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
74
ROM CORRECTION FUNCTION
This can correct program data in ROM. Up to 2 addresses (2 blocks)
can be corrected, a program for correction is stored in the ROM cor-
rection memory in RAM. The ROM memory for correction is 32 bytes
2 blocks.
Block 1 : addresses 02C0
16
to 02DF
16
Block 2 : addresses 02E0
16
to 02FF
16
Set the address of the ROM data to be corrected into the ROM cor-
rection address register. When the value of the counter matches the
ROM data address in the ROM correction address, the main pro-
gram branches to the correction program stored in the ROM memory
for correction. To return from the correction program to the main pro-
gram, the op code and operand of the JMP instruction (total of 3
bytes) are necessary at the end of the correction program. When the
blocks 1 and 2 are used in series, the above instruction is not needed
at the end of the block 1.
The ROM correction function is controlled by the ROM correction
enable register.
Notes 1 :
Specify the first address (op code address) of each
instruction as the ROM correction address.
2 :
Use the JMP instruction (total of 3 bytes) to return from
the correction program to the main program.
3 :
Do not set the same ROM correction address to the blocks
1 and 2.
Fig. 72. ROM Correction Address Registers
Fig. 73. ROM Correction Enable Register
0217
16
ROM correction address 1 (high-order)
0218
16
ROM correction address 1 (low-order)
0219
16
ROM correction address 2 (high-order)
021A
16
ROM correction address 2 (low-order)
b7 b6 b5 b4 b3 b2 b1 b0
ROM correction enable register (RCR) [Address 021B
16
]
B
After reset
R W
ROM Correction Enable Register
0
Block 1 enable bit (RC0)
Name
Functions
0: Disabled
1: Enabled
1
Block 2 enable bit (RC1)
0: Disabled
1: Enabled
4
to
7
Nothing is assigned. These bits are write disable bits. When
these bits are read out, the values are “0.”
0
0
0
R W
R W
R —
0
0
2, 3 Fix these bits to“0.”
0
R W
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M3720-10 | 1 KEY 1 SOUND |
| M3720-2 | 1 KEY 1 SOUND |
| M3720-3 | 1 KEY 1 SOUND |
| M3720-4 | 1 KEY 1 SOUND |
| M3720-5 | 26604060VOID34 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M3720-10 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:1 KEY 1 SOUND |
| M3720-2 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:1 KEY 1 SOUND |
| M3720-3 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:1 KEY 1 SOUND |
| M3720-4 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:1 KEY 1 SOUND |
| M3720-5 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:1 KEY 1 SOUND |
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