參數(shù)資料
型號(hào): M12S16161A
廠商: Electronic Theatre Controls, Inc.
英文描述: 512K x 16Bit x 2Banks Synchronous DRAM
中文描述: 為512k × 16Bit的X 2Banks同步DRAM
文件頁數(shù): 26/28頁
文件大小: 871K
代理商: M12S16161A
ESMT
Mode Register Set Cycle
M12S16161A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Jun. 2005
Revision
:
1.0
26/28
Auto Refresh Cycle
*Both banks precharge should be completed before Mode Register Set cycle and auto refresh cycle.
MODE REGISTER SET CYCLE
*Note: 1.CS ,RAS ,CAS &
WE
activation at the same clock cycle with address key will set internal mode register.
2.Minimum 2 clock cycles should be met before new RAS activation.
3.Please refer to Mode Register Set table.
C L O C K
C K E
A D D R
Key
:Don't Care
HIGH
CS
RAS
CAS
HIGH
*Note3
Ra
*Note1
DQ
H i - Z
DQ M
1 2 3 4 5 6 0 1 2 3 4 5 6 7 8 9 10
H i - Z
*Note2
t
R C
MR S
New Comm and
Auto Refresh
New Command
W E
0
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