參數(shù)資料
型號: M12S16161A
廠商: Electronic Theatre Controls, Inc.
英文描述: 512K x 16Bit x 2Banks Synchronous DRAM
中文描述: 為512k × 16Bit的X 2Banks同步DRAM
文件頁數(shù): 12/28頁
文件大?。?/td> 871K
代理商: M12S16161A
ESMT
M12S16161A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Jun. 2005
Revision
:
1.0
12/28
*Note:
1. All inputs expect CKE & DQM can be don’t care when CS is high at the CLK high going edge.
2. Bank active & read/write are controlled by BA.
BA
Active & Read/Write
0
Bank A
1
Bank B
3.Enable and disable auto precharge function are controlled by A10/AP in read/write command.
A10/AP
BA
Operation
0
Disable auto precharge, leave bank A active at end of burst.
0
1
Disable auto precharge, leave bank B active at end of burst.
0
Enable auto precharge, precharge bank A at end of burst.
1
1
Enable auto precharge, precharge bank B at end of burst.
4.A10/AP and BA control bank precharge when precharge command is asserted.
A10/AP
BA
precharge
0
0
Bank A
0
1
Bank B
1
X
Both Banks
相關(guān)PDF資料
PDF描述
M12S16161A-10T 512K x 16Bit x 2Banks Synchronous DRAM
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M12S16161A-15TG 512K x 16Bit x 2Banks Synchronous DRAM
M1300 Mini size of Discrete semiconductor elements
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