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參數(shù)資料
| 型號： | LU5X31F |
| 廠商： | Lineage Power |
| 英文描述： | Gigabit Ethernet Transceiver(千兆位以太網(wǎng)收發(fā)器) |
| 中文描述： | 千兆以太網(wǎng)收發(fā)器（千兆位以太網(wǎng)收發(fā)器） |
| 文件頁數(shù)： | 9/22頁 |
| 文件大?。?/td> | 348K |
| 代理商： | LU5X31F |
9
Lucent Technologies Inc.
Preliminary Data Sheet
August 2000
LU5X31F
Gigabit Ethernet Transceiver
Input/Output Information
(continued)
Table 2b. I/O Control/PLL Interface Descriptions
Table 2c. Power Connections
Pin
49
Name
OLREF
I/O
Level
Analog
Description
Input/Output
Output Level Reference.
PECL level set resistor
terminal 1.
Output Level Ground.
PECL level set resistor
terminal 2.
RESETN.
Active-low, internally pulled high.
48
OLRVS
Input/Output
Analog
26
(NC)/
RESETN
TEST5
(NC)/
TEST[4:1]
BYPPLL
Input
TTL/CMOS
10
Input/Output
Input
TTL/CMOS
TTL/CMOS
Global Test Control Input/Output.
Factory Test Pins.
Internally pulled low.
1, 16, 17, 27
15
Input
TTL/CMOS
Test Control-PLL Bypass Mode.
Pin
Name
V
DD
V
DD
R
V
DD
T
V
DD
P
V
SS
V
SS
R
V
SS
T
V
SS
P
Description
5, 10, 18, 20, 23, 28, 29, 37, 42, 63
53, 55, 57
59, 60
50
1, 14, 15, 21, 25, 32, 33, 46, 64
56
58
51
Digital Power.
High-Speed Receive Analog Power.
High-Speed Transmit Analog Power.
PLL Power.
Digital Ground.
High-Speed Receive Analog Ground.
High-Speed Transmit Analog Ground.
PLL Ground.
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