參數(shù)資料
型號(hào)： LU5X31F
廠商： Lineage Power
英文描述： Gigabit Ethernet Transceiver(千兆位以太網(wǎng)收發(fā)器)
中文描述： 千兆以太網(wǎng)收發(fā)器（千兆位以太網(wǎng)收發(fā)器）
文件頁(yè)數(shù)： 8/22頁(yè)
文件大?。?/td> 348K
代理商： LU5X31F
8
Lucent Technologies Inc.
LU5X31F
Gigabit Ethernet Transceiver
Preliminary Data Sheet
August 2000
Input/Output Information
(continued)
Table 2a. I/O Channel Signal Description
PIN
2—4,
6—9,
11—13
34—36,
38—41,
43—45
Name
TX[9:0]
I/O
Input
Level
TTL/
CMOS
Description
Transmit Data.
One 10-bit, parallel 8b/10b encoded
data byte clocked in on the rising edge of REFCLK.
TX0 is the leading LSB.
Receive Data.
One 10-bit parallel 8b/10b encoded
data byte clocked out on the alternate rising edges of
RXCLK0, RXCLK1. RX0 is the leading LSB. Any
receive code-group containing a comma character is
clocked by the RXCLK1.
Reference Clock.
This 100 MHz—125 MHz clock is
used to latch TX[9:0] data into the LU5X31F for trans-
mission and is used by the transmitter PLL to generate
the 1.0 Gbits/s—1.25 Gbits/s serial data. REFCLK has
a ±100 ppm tolerance requirement.
Receive Clock 0.
62.5 MHz used to latch odd-num-
bered code-groups in the receive data stream. This
clock may be stretched during code-group alignment,
but should not be truncated or slivered.
Receive Clock 1.
62.5 MHz used to latch even-num-
bered code-groups in the receive data stream. This
clock may be stretched during code-group alignment
but should not be truncated or slivered. RXCLK1 is
180 degrees out of phase with RXCLK0. Note that the
comma pattern (contained in groups K28.1, K28.5,
K28.7) is constrained to only appear in even-numbered
code-group positions.
Transmit Data.
Positive differential PECL serialized
transmit data at 1.25 Gbits/s; requires external trans-
mission line termination, as given in Figure 8.
Transmit Data.
Negative differential PECL serialized
transmit data at 1.25 Gbits/s; requires external trans-
mission line termination, as given in Figure 8.
Receive Data.
Positive differential PECL serialized
receive data at 1.25 Gbits/s; requires external transmis-
sion line termination, as given in Figure 8.
Receive Data.
Negative differential PECL serialized
receive data at 1.25 Gbits/s; requires external transmis-
sion line termination, as given in Figure 8.
Comma Detect.
Asserted high for a full RXCLK1 cycle
to indicate that a comma code-word is present on
RX[9:0].
Enable Comma Detect.
Enables COMDET and code-
word synchronization when set high. When low, dis-
ables COMDET and maintains current code-word
alignment.
Enable Wrap.
Enables the LU5X31F to internally loop
serialized transmit data to the deserializer. HDOUTP
and HDOUTN outputs remain active.
RX[9:0]
Output
TTL/
CMOS
22
REFCLK
Input
TTL/
CMOS
31
RXCLK0
Output
TTL/
CMOS
30
RXCLK1
Output
TTL/
CMOS
62
HDOUTP
Output
PECL
61
HDOUTN
Output
PECL
54
HDINP
Input
PECL
52
HDINN
Input
PECL
47
COMDET
Output
TTL/
CMOS
24
ENCDET
Input
TTL/
CMOS
19
EWRAP
Input
TTL/
CMOS
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