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參數(shù)資料
| 型號： | LPC3240FET296 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | ARM926EJ-S with 256 kB SRAM, USB High-speed OTG, SD-MMC, NAND flash controller, Ethernet |
| 中文描述： | 32-BIT, FLASH, 266 MHz, RISC MICROCONTROLLER, PBGA296 |
| 封裝： | 15 X 15 MM, 0.70 MM PITCH, PLASTIC, MO-216, SOT1048-1, TFBGA-296 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大?。?/td> | 121K |
| 代理商： | LPC3240FET296 |
ES_LPC3240
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Errata sheet
Rev. 9 — 1 June 2011
7 of 17
NXP Semiconductors
ES_LPC3240
Errata sheet LPC3240
Work-around:
When interfacing an external peripheral device that does not support burst mode access
through the EMC Static Memory interface the following work-arounds are recommended:
1. Avoid using DMA to transfer read blocks of data from the external device. Instead use
a software loop with LDR instruction to read blocks of data from the external device.
2. If DMA can't be avoided, ensure there is at least one unused address between the
highest address used for the external device DMA data buffer and any status or
control register in the device that will initiate any unwanted action just by reading from
the register (i.e. clear an interrupt or status).
3.2 NOR.1: When booting from NOR flash, SDRAM devices will not
release the data bus, preventing the LPC3240 from booting correctly
Introduction:
In systems that use SDRAM and boot from NOR FLASH, an issue can occur on system
reset that will prevent the SDRAM devices from releasing the data bus. This will prevent
normal operation of NOR FLASH due to data bus contention and prevent the LPC3240
from booting correctly. This applies to systems using either Single Data Rate (SDR) or
Double Data Rate (DDR) SDRAM devices.
Problem:
If the LPC3240 is reset during an SDRAM access, the SDRAM clock and clock enable will
be immediately de-asserted. If the de-assertion occurs during the period of time the
SDRAM is driving the data bus, the SDRAM will hold that state until the next clock occurs
at the SDRAM clock input when the clock enable is active. However, the LPC3240 won't
deliver the clock and clock enables until software actually sets up the EMC state to do
this, so the SDRAM will remain in the data assertion state on the data bus while the
LPC3240 tries to boot.
When the chip attempts to load boot code from NOR FLASH after reset, the correct
signals are asserted to the NOR FLASH device and the NOR FLASH device places its
data on the data bus. But if the SDRAM is still driving the bus, the NOR FLASH device
and SDRAM device are in contention and the data will not be read correctly into the
LPC3240. In this situation, the LPC3240 will fail to boot.
Work-around:
Since this issue only occurs with NOR FLASH, using one of the other boot methods such
as NAND or SPI FLASH boot is a good workaround for the issue.
If booting from NOR FLASH is a requirement, the simple circuit shown in
Figure 3
can be
used to clear the SDRAM state at system reset. This will not change the normal
functioning of the LPC3240 EMC or SDRAM operations. If SDRAM devices are also
present on the 2nd SDRAM chip select, a similar circuit will be needed for those devices
using EMC_CKE1.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC3240FET296,551 | 功能描述:ARM微控制器 - MCU ARM9 256KRAM VFP USB OTG ETH RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC3240FET296/01 | 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 266MHZ, TFBGA-296 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 266MHZ, TFBGA-296, Controller Family/Series:LPC3200, Core Size 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 266MHZ, TFBGA-296, Controller Family/Series:LPC3200, Core Size:16bit / 32bit, No. of I/O's:87, Supply Voltage Min:2.7V, Supply Voltage Max:3.6V, Digital IC Case Style:TFBGA, No. of Pins:296, Program Memory Size:-, |
| LPC3240FET296/01,5 | 功能描述:ARM微控制器 - MCU ARM9 VFP USB OTG Improved LCD RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC3240FET296/01,551 | 制造商:NXP Semiconductors 功能描述:0 |
| LPC3240FET296/015 | 制造商:NXP Semiconductors 功能描述:LPC3240FET296/TFBGA296/TRAYBDP |
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