- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄44574 > LMX2353TMX/NOPB (NATIONAL SEMICONDUCTOR CORP) PHASE LOCKED LOOP, 2500 MHz, PDSO16 PDF資料下載
參數(shù)資料
| 型號： | LMX2353TMX/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PHASE LOCKED LOOP, 2500 MHz, PDSO16 |
| 封裝： | LEAD FREE, PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 209K |
| 代理商： | LMX2353TMX/NOPB |
Connection Diagrams
Pin Description
Pin No.
Pin
Name
I/O
Description
CSP
TSSOP
16
1
V
P
—
Power supply for charge pump. Must be
≥ V
CC.
12
CP
O
Charge pump output. Connected to a loop filter for driving the control input of an
external VCO.
2
3
GND
—
Ground for PLL digital circuitry.
34
f
IN
I
RF prescaler input. Small signal input from the VCO.
45
f
INB
I
RF prescaler complimentary input. A bypass capacitor should be placed as close
as possible to this pin and be connected directly to the ground plane.
5
6
GND
—
Ground for PLL analog circuitry.
6
7
OSC
in
I
Oscillator input. A CMOS inverting gate input. The input has a V
CC/2 input
threshold and can be driven from an external CMOS or TTL logic gate.
78
F
oLD
O
Multiplexed output of N or R divider and lock detect. CMOS output.
8
9
CE
I
PLL Enable. Powers down N and R counters, prescalers, and TRI-STATE charge
pump output when LOW. Bringing CE high powers up PLL depending on the state
of CTL_WORD.
9
10
CLK
I
High impedance CMOS Clock input. Data for the various counters is clocked into
the 24-bit shift register on the rising edge.
10
11
DATA
I
Binary serial data input. Data entered MSB first. The last two bits are the control
bits. High impedance CMOS input.
11
12
LE
I
Load enable high impedance CMOS input. Data stored in the shift registers is
loaded into one of the 4 internal latches when LE goes HIGH.
12
13
GND
—
Ground.
13
14
V
CC
—
PLL power supply voltage input. May range from 2.7V to 5.5V. Bypass capacitors
should be placed as close as possible to this pin and be connected directly to the
ground plane.
14
15
OUT1
—
Programmable CMOS output. Level of the output is controlled by F2[18] bit.
15
16
OUT0
—
Programmable CMOS output. Level of the output is controlled by F2[17] bit.
DS101124-2
TOP VIEW
Order Number LMX2353TM or
LMX2353TMX
See NS Package Number MTC16
DS101124-3
TOP VIEW
Order Number LMX2353SLBX
See NS Package Number SLB16A
www.national.com
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LMX2354SLBX/NOPB | PLL FREQUENCY SYNTHESIZER, 2500 MHz, QCC24 |
| LMX2354TM/NOPB | PLL FREQUENCY SYNTHESIZER, 2500 MHz, PDSO24 |
| LMX2354SLDX | PLL FREQUENCY SYNTHESIZER, 2500 MHz, CQCC24 |
| LMX2355SLBX | PLL FREQUENCY SYNTHESIZER, 2500 MHz, QCC24 |
| LMX2370SLDX | PLL FREQUENCY SYNTHESIZER, 2500 MHz, QCC24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2354 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum Fractional N RF/ Integer N IF Dual Low Power Frequency Synthesizer |
| LMX2354SLB | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum Fractional N RF/ Integer N IF Dual Low Power Frequency Synthesizer |
| LMX2354SLBX | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| LMX2354SLBX/NOPB | 功能描述:IC FREQ SYNTH DUAL 24-LAMCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| LMX2354SLDX | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。