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參數(shù)資料
| 型號(hào)： | LM4560 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Advanced PCI Audio Accelerator |
| 中文描述： | 先進(jìn)的PCI音頻加速器 |
| 文件頁數(shù)： | 20/54頁 |
| 文件大?。?/td> | 380K |
| 代理商： | LM4560 |
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3.0 Register Description
(Continued)
1: Enable (Default)
Bit 17 (SURROUT_EN) SURROUT L/R Slot Enable
0: Disable
1: Enable
Bit 18 (CENTEROUT_EN) CENTEROUT Slot Enable
0: Disable
1: Enable
Bit 19 (LFEOUT_EN) LFEOUT Slot Enable
0: Disable
1: Enable
Bit 20 (LINE1OUT_EN) LINE1OUT Slot Enable
0: Disable
1: Enable
Bit 21 (LINE2OUT_EN) LINE2OUT Slot Enable
0: Disable
1: Enable (If DBLRATE_EN is 0)
Bit 22 (HSETOUT_EN) HSETOUT Slot Enable
0: Disable
1: Enable (If DBLRATE_EN is 0)
Bit 23 (GPIOOUT_EN) GPIOOUT Slot Enable
0: Disable
1: Enable (If DBLRATE_EN is 0)
Bit 24 (CODECA_RDY) Primary CODEC Ready flag (Read
only)
0: Not ready
1: Ready
Bit 25 (CODECB_RDY) Secondary CODEC Ready flag
(Read only)
0: Not ready
1: Ready
Bit 26 (CODEC_PD) CODEC Power Down State flag Read
only.
0: Normal
1: CODEC is in power down mode
When PM_ST enters D3, this bit will be set.
Other bits are reserved
3.4.5.4 ACGPIO (AC97 General Purpose IO Register)
Address:
AudioBase + 4Ch
Size:
32 bits
Type:
Read/Write
Default:
00000000h
Bit 0 Reseved.
Bit 1 (GP_IRQ1) Primary CODEC GPIO_INT register
This bit will be updated with Primary input Slot 12 bit 0 of ev-
ery AC97 frame.
Bit 2 (GP_IRQ2) Secondary CODEC GPIO_INT register
This bit will be updated with Secondary input Slot 12 bit 0 of
every AC97 frame.
Bit 3 (GP_INT1_En) Primary CODEC GPIO_INT Enable
0: Disable
1: Enable
Bit 4 (GP_INT2_En) Secondary CODEC GPIO_INT Enable
0: Disable
1: Enable
Bit 14–5 reserved
Bit 15 (COMMAND/STATUS)
This bit is status when read.
0 ready to output AC-97 Slot 12
1 busy
This bit is command when write
0 do nothing
1 output AC-97 Slot 12
Bit 31..16 (ACGPIO_OUT) data to be written into AC-97
through output Slot 12;
3.4.6 Misc and Status Register
These 16-byte registers can only be accessed on Audio
Base (I/O or MEM).
3.4.6.1 ASR0 (TSAudio Status Register)
Address:
AudioBase + 50h
Size:
32 bits
Type:
Read Only
Default:
00000000h
Bit 2..0 LegacyCMD
000 stop: No any operation. No contribution to Digital Mixer
001 run: Normal operation.
010 silent_DMA : SBCL will count; CA, CBC won’t count.
No data fetching. No interpolation. No contribution to Digital
Mixer
011 reserve
100 silent_SB: SBCL, CA & CBC will count as the same as
run mode.
No data fetching. No interpolation. No contribution to Digital
Mixer
101pause: SBCL, CA & CBC don’t change.
let SBALPHA unchanged, CACHE_HIT=1
drive current LD (or LD_L, LD_R) to Digital Mixer
110 reserve
111 direct play: SBCL, CA & CBC don’t change.
drive SBDD to Digital Mixer
Bit 3
0: SB DMA loop disable
1: SB DMA loop enable
Bit 4
0: playback
1: recording
Bit 5
0: unsigned data format
1: signed data format
Bit 6
0: mono
1: stereo
Bit 7
0: 8-bit data format
1: 16-bit data format
Bit 9..8
00: SB ESP Engine Command Port Not Busy
01: SB ESP Engine Command Port Busy
www.national.com
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| LM4562HA | 制造商:Texas Instruments 功能描述:OP Amp Dual GP ??17V 8-Pin TO-99 Tray |
| LM4562HA/NOPB | 功能描述:運(yùn)算放大器 - 運(yùn)放 RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
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