參數(shù)資料
型號(hào): L64777
廠商: LSI CORP
元件分類: 消費(fèi)家電
英文描述: Digital Video Broadcasting(DVB)-Compliant,quadrature amplitude modulation (QAM)Modulator(數(shù)字視頻廣播系統(tǒng)適配的積分調(diào)幅調(diào)制器)
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP120
封裝: 32 MM, PLASTIC, QFP-120
文件頁數(shù): 107/124頁
文件大?。?/td> 988K
代理商: L64777
Read Cycle Using the Serial Bus Interface
A-5
7.
The master generates another start condition.
8.
The master repeats steps 2–7 to address the appropriate group and
write 1 or more data bytes.
9.
The master terminates the cycle by issuing a stop condition.
Figure A.4
Burst Write to Slave (Master-Transmitter, Slave-Receiver)
A.4 Read Cycle Using the Serial Bus Interface
Figure A.5 shows the timing for a burst, or a single read cycle. The
following cycles must take place for a read cycle:
1.
The master starts the cycle by issuing a start condition.
2.
The master transmits the 7-bit slave address.
3.
The master sets the R/W bit = 0 to indicate a write cycle.
4.
The addressed slave acknowledges the reception of the slave
address by driving SDA low in the ACK cycle.
5.
The master sends the 8-bit Group 0 address (0x0) to indicate that
the APR is to be loaded. (The master accesses Group 0 only to load
the APR.)
Start
Condition
Stop
Condition
SCL
SDA
Bit 7
Bit 6
Bit 5
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
R/W
3
ACK
(Slave)
4
Bit 0
7-bit Slave
Address
8-bit Group
Address
ACK
(Slave)
5
2
1
ACK
(Slave)
6
8-bit Data
Start
Condition
7
7-bit Slave
Address
ACK
(Slave)
ACK
(Slave)
ACK
(Slave)
ACK
(Slave)
8-bit Group
Address
8-bit Data
8-bit Data
9
8
SDA
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