參數(shù)資料
型號: KSZ8842-PMQL-EVAL
廠商: Micrel Inc
文件頁數(shù): 74/119頁
文件大?。?/td> 0K
描述: BOARD EVALUATION KSZ8842-PMQL
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng)控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8842-PMQL
主要屬性: 2 個(gè)端口,100BASE-TX/10BASE-T
次要屬性: 8/16 位接口,LinkMD 線纜診斷
已供物品:
產(chǎn)品目錄頁面: 1114 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: 576-3348-ND - IC ETHERNET SW 2PORT 100-LFBGA
576-3089-ND - IC ETHERNT SW 2PORT PCI 100LFBGA
576-2121-ND - IC ETHERNET SW 2PORT PCI 128PQFP
576-1513-5-ND - IC SWITCH 10/100 32BIT 128-PQFP
其它名稱: 576-1636
Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
58
M9999-100207-1.5
Switch Global Control Register 7 (0x0412): SGCR7
This register contains the global control for the switch function.
Bit
Default
R/W
Description
15 – 8
0
RW
7
0
RW
Unknown Default Port Enable
Send packets with unknown destination address to specified ports in bits
[2:0].
1 = enable to send unknown DA packet
6 – 3
0x0
RW
For factory test only. Always write 0.
2 – 0
0x7
RW
Unknown Packet Default Port(s)
Specify which ports to send packets with unknown destination addresses.
Feature is enabled by bit [7].
Bit 2: for the host port
Bit 1: for the port 2
Bit 0: for the port 1
Reserved (Offset 0x0414 - 0x046F)
MAC Address Register 1 (Offset 0x0470): MACAR1
This register contains the MAC address for the switch function. This MAC address is used to send the PAUSE frame.
Bit
Default
R/W
Description
15 – 0
0x0010
RW
MACA[47:32]
Specify host MAC address 1. This value must be the same as MAC
Address Register High (0x0204): MARH.
MAC Address Register 2 (Offset 0x0472): MACAR2
This register contains the MAC address for the switch function. This MAC address is used to send the PAUSE frame.
Bit
Default
R/W
Description
15 – 0
0xA1FF
RW
MACA[31:16]
Specify host MAC address 2. This value must be the same as MAC
Address Register Middle (0x0202): MARM.
MAC Address Register 3 (Offset 0x0474): MACAR3
This register contains the MAC address for the switch function. This MAC address is used to send the PAUSE frame.
Bit
Default
R/W
Description
15 – 0
0xFFFF
RW
MACA[15:0]
Specify host MAC address 3. This value must be the same as MAC
Address Register Low (0x0200): MARL.
Reserved (Offset 0x0476 - 0x047F)
This register is reserved.
Bit
Default
R/W
Description
15 – 0
0x0000
RO
Reserved
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