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參數(shù)資料
| 型號(hào)： | KM29W8000T |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1M x 8 Bit NAND Flash Memory(1M x 8 位 NAND閃速存儲(chǔ)器) |
| 中文描述： | 100萬(wàn)× 8位NAND快閃記憶體（1米× 8位的NAND閃速存儲(chǔ)器） |
| 文件頁(yè)數(shù)： | 3/23頁(yè) |
| 文件大?。?/td> | 266K |
| 代理商： | KM29W8000T |
第1頁(yè)第2頁(yè)當(dāng)前第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)
KM29W8000T, KM29W8000IT
FLASH MEMORY
3
256B Column
8B Column
Figure 1. FUNCTIONAL BLOCK DIAGRAM
Figure 2. ARRAY ORGANIZATION
NOTE
: A
12
to A
19
: Block Address * : X can be V
IL
or V
IH
.
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
1st Cycle
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
2nd Cycle
A
8
A
9
A
10
A
11
A
12
A
13
A
14
A
15
3rd Cycle
A
16
A
17
A
18
A
19
*X
*X
*X
*X
8M : 4K Row
(=256 Block)
256 Byte
8 bit
8 Byte
1 Block(=16 Row)
(4K + 128)Byte
I/O
0
~ I/O
7
1 Page = 264 Byte
1 Block = 264 B x 16 Pages
= (4K + 128) Bytes
1 Device = 264B x 16Pages x 256 Blocks
= 8.6 Mbits
Column Address
Row Address
(Page Address)
Page Register
X-Buffers
Latches
& Decoders
8M + 256K Bit
NAND Flash
ARRAY
Command
Register
(256 + 8)Byte x 4096
Y-Gating
Page Register & S/A
I/O Buffers & Latches
Latches
& Decoders
Control Logic
& High Voltage
Generator
Global Buffers
Output
Driver
A
8
- A
19
A
0
- A
7
Command
CE
RE
WE
CLE ALE WP
I/0
0
I/0
7
v
CC
v
SS
v
CC
v
SS
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