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參數(shù)資料
| 型號(hào)： | KM29W32000AT |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲(chǔ)器) |
| 中文描述： | 4米× 8位NAND閃存（4米× 8位的NAND閃速存儲(chǔ)器） |
| 文件頁(yè)數(shù)： | 16/17頁(yè) |
| 文件大?。?/td> | 239K |
| 代理商： | KM29W32000AT |
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KM29W32000AT, KM29W32000AIT
FLASH MEMORY
READY/BUSY
The device has a R/
B
output that provides a hardware method of indicating the completion of a page program, erase and random
read completion. The R/B pin is normally high but transitions to low after program or erase command is written to the command reg-
ister or random read is begin after address loading. It returns to high when the internal controller has finished the operation. The pin
is an open-drain driver thereby allowing two or more R/ B outputs to be Or-tied. An appropriate pull-up resister is required for proper
operation and the value may be calculated by following equation.
Rp =
V
CC
R/B
open drain output
Device
GND
V
CC
(Max.) - V
OL
(Max.)
I
OL
+
∑
I
L
=
Note*
8mA +
∑
I
L
where I
L
is the sum of the input currents of all devices tied to the
R/B pin.
Note* KM29V32000 : 3.2V
KM29N32000 : 5.1V
KM29W32000 : 5.1V When Vcc=3.6~5.5V
3.2V When Vcc=2.7~3.6V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KM29W32000AK1 | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲(chǔ)器) |
| KM29W32000ATS | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲(chǔ)器) |
| KM29W32000IT | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲(chǔ)器) |
| KM29W32000T | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲(chǔ)器) |
| KM29W32000K1 | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲(chǔ)器) |
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