- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374353 > KM29W32000AT (SAMSUNG SEMICONDUCTOR CO. LTD.) 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲器) PDF資料下載
參數(shù)資料
| 型號： | KM29W32000AT |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲器) |
| 中文描述： | 4米× 8位NAND閃存（4米× 8位的NAND閃速存儲器） |
| 文件頁數(shù)： | 12/17頁 |
| 文件大小： | 239K |
| 代理商： | KM29W32000AT |
KM29W32000AT, KM29W32000AIT
FLASH MEMORY
Figure 6. Sequential Read2 Operation
(SE=fixed low)
PAGE PROGRAM
The device is programmed basically on a page basis, but it does allow multiple partial page programming of a byte or consecutive
bytes up to 528, in a single page program cycle. The number of consecutive partial page programming operation within the same
page without an intervening erase operation must not exceed ten. The addressing may be done in any random order in a block. A
page program cycle consists of a serial data loading period in which up to 528 bytes of data may be loaded into the page registe r, fol-
lowed by a nonvolatile programming period where the loaded data is programmed into the appropriate cell. Serial data loading can
be started from 2nd half array. About the pointer operation, please refer to the attached technical notes.The serial data loadin g period
begins by inputting the Serial Data Input command(80H), followed by the three cycle address input and then serial data loading. The
bytes other than those to be programmed do not need to be loaded.
The Page Program confirm command(10H) initiates the programming process. Writing 10H alone without perviously entering the
serial data will not initiate the programming process. The internal write controller automatically executes the algorithms and t imings
necessary for program and verify, thereby freeing the CPU for other tasks. Once the program process starts, the Read Status Regi s-
ter command may be entered, with RE and CE low, to read the status register. The CPU can detect the completion of a program
cycle by monitoring the R/B output, or the Status bit(I/O
6
) of the Status Register. Only the Read Status command and Reset com-
mand are valid while programming is in progress. When the Page Program is complete, the Write Status Bit(I/O
checked(Figure 7). The internal write verify detects only errors for "1"s that are not successfully programmed to "0"s. The comm and
register remains in Read Status command mode until another valid command is written to the command register.
0
) may be
50H
A
0
~ A
3
& A
9
~ A
21
I/O
0
~
7
R/B
Start Add.(3Cycle)
Data Output
Data Output
Data Output
2nd
Nth
(16 Byte)
(16 Byte)
1st half array 2nd half array
Data Field
Spare Field
1st
2nd
Nth
(A
4
~ A
7
:
Don't Care)
1st
Figure 7. Program & Read Status Operation
80H
A
0
~ A
7
& A
9
~ A
21
528 Byte Data
Address & Data Input
I/O
0
Pass
10H
70H
Fail
I/O
0
~
7
R/B
t
R
t
R
t
R
t
PROG
≈
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KM29W32000AK1 | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲器) |
| KM29W32000ATS | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲器) |
| KM29W32000IT | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲器) |
| KM29W32000T | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲器) |
| KM29W32000K1 | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM2M COMBO-L | 制造商:Micro-Star International 功能描述:KM266 UATX AMD 266FSB DDR - Bulk |
| KM2M806XT | 制造商:Kontron 功能描述:M2M DEPLOYMENT UNIT FOR APPLICATIONS IN HARSH ENVIRONMENTS - Boxed Product (Development Kits) |
| KM2M810-01 | 制造商:Kontron 功能描述:FRI 2.0 DEVELOPMENT KIT WITHOUT THE ERICSSON MODEM - Boxed Product (Development Kits) |
| KM2M810-02 | 制造商:Kontron 功能描述:FRI 2.0 DEVELOPMENT KIT WITH ERICSSON MODEM - Boxed Product (Development Kits) |
| KM2M810-08 | 制造商:Kontron 功能描述:FRI 2.0 DEV KIT WITH ERICSSON MODEM, PTCRB CERTIFIED - Boxed Product (Development Kits) |
發(fā)布緊急采購，3分鐘左右您將得到回復。