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參數資料
| 型號： | ISPPAC10-01PI |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調理 |
| 英文描述： | In-System Programmable Analog Circuit |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數： | 9/23頁 |
| 文件大小： | 415K |
| 代理商： | ISPPAC10-01PI |
Specifications
ispPAC10
9
Figure 1. FilSum (Filtering/Summation) PACblock
Diagram
gm3
gm1
gm2
VIN
VIN
VOUT
VOUT+
VOUT-
VIN+
VIN-
VIN+
VIN-
CF
CF
IA1
IA2
IAF
Each FilSum PACblock actually employs three instrument
amplifier (IA) PACells: two at the input (IA1 and IA2) and one
as a feedback element around the op amp (IAF). The
instrument amplifier PACells all have differential I/O and
convert an input voltage to an output current (refer to Figure
2). This type of amplifier is sometimes referred to as an
operational transconductance amplifier or OTA. When a
differential input voltage is applied to these IAs, it is
converted to a current proportional to the input signal.
Because an AC signal common to both of the high
impedance inputs of the IA does not create a net differ-
ence in the input signal, it is rejected by the amplifier. This
characterizes the function of what is commonly known as
an instrument amplifier and is a very desirable property
because it acts to preserve the integrity of small signals
in the presence of otherwise overwhelming noise.
Figure 2. Instrument Amplifier PACell
gm
VIN+
VIN
VIN-
IM
IP
The two input instrument amplifiers have a program-
mable transconductance (g
m
) value in 10 steps between
2
μ
A/V and 20
μ
A/V with programmable input polarity,
whereas the feedback amplifier is fixed at 2
μ
A/V. The IA
PACells exhibit extremely high input impedance so they
don
’
t load circuitry driving them and their outputs can be
enabled or disabled under E
2
CMOS control, effectively
switching them in and out of the FilSum PACblock cir-
cuitry. These simple characteristics permit a great deal of
functionality: Signals can be summed, the resistive am-
plifier feedback can be removed to create an integrator,
the sign of PACblock transfer function can be changed
without changing the input or output loading characteris-
tics. The FilSum PACblock can precisely filter, amplify or
attenuate signals, always maintaining the high imped-
ance input qualities of instrumentation amplifiers.
FilSum PACblock Operation
All ispPAC10 inputs are differential, the input signal being
the difference between input amplifier (IA) PACell pins
V
IN+
(Positive Input) and V
IN-
(Minus Input). The common
mode value of the input is ignored, and as long as the
inputs are not within one volt of the supply rails, the part
is in its linear operating region. As the input signal range
exceeds these limits, distortion begins to increase until
clipping occurs. This is discussed further in the advanced
topics section.
The output is also differential, being the difference be-
tween output amplifier (OA) PACell pins V
OUT+
and
V
OUT-
. The output maintains high linearity to within 100mV
of the supply rails under minimum load. The output has
short circuit protection and is capable of driving resistive
loads as low as 300
or capacitances as large as
1000pF. The output common mode voltage is maintained
at VREF
OUT
independent of the input common mode
level. That is, the output amplifier PACell
“
re-references
”
the common mode level of the input signal. This is
accomplished by continuously sensing the output com-
mon mode voltage and comparing it to VREF
OUT
as
shown in Figure 3, and makes it possible to use an
individual FilSum PACblock as a VREF
OUT
reference as
discussed in the section titled
“
Using VREF
OUT
”
.
Figure 3. Output VREF
OUT
Re-Referencing
VOUT
CF
CF
VCMIN (2.5V)
IAF
Input Offset Auto-Calibration.
A unique feature of the
ispPAC10 is its ability to automatically calibrate itself to
achieve very low offset error. This is done utilizing on-
chip circuitry to perform an auto-calibration (auto-cal)
Theory of Operation (Continued)
相關PDF資料 |
PDF描述 |
|---|---|
| ISPPAC10-01SI | In-System Programmable Analog Circuit |
| ISPPAC20 | In-System Programmable Analog Circuit |
| ISPPAC20-01J | In-System Programmable Analog Circuit |
| ISPPAC20-01JI | In-System Programmable Analog Circuit |
| ISPPAC30 | In-System Programmable Analog Circuit |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISPPAC10-01SI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC20 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit |
| ISPPAC20-01J | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit |
| ISPPAC20-01JI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC20-01TI | 功能描述:SPLD - 簡單可編程邏輯器件 Not Upgrade Device CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
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