參數資料
型號: ISPPAC10-01PI
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: 模擬信號調理
英文描述: In-System Programmable Analog Circuit
中文描述: SPECIALTY ANALOG CIRCUIT, PDIP28
封裝: PLASTIC, DIP-28
文件頁數: 4/23頁
文件大?。?/td> 415K
代理商: ISPPAC10-01PI
Specifications
ispPAC10
4
Timing Specifications
T
A
= 25
°
C; V
S
= +5.0V (Unless otherwise specified).
SYMBOL
PARAMETER
CONDITION
MIN.
TYP.
MAX.
UNITS
Dynamic Performance
tckmin
tckh
tckl
tmss
tmsh
tdis
tdih
tdozx
tdov
tdoxz
trstmin
tpwp
tpwe
tpwcal1
tcalmin
tpwcal2
Minimum Clock Period
TCK High Time
TCK Low Time
TMS Setup Time
TMS Hold Time
TDI Setup Time
TDI Hold Time
TDO Float to Valid Delay
TDO Valid Delay
TDO Valid to Float Delay
Minimum reset pulse width
Time for a programming operation
Time for an erase operation
Time for auto-cal operation on power-up
Minimum auto-cal pulse width
Time for user initiated auto-cal operation
200
50
50
15
10
15
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
ms
ns
ms
60
60
60
40
80
80
Executed in Run-Test/Idle
Executed in Run-Test/Idle
Automatically executed at power-up
100
100
250
40
Executed on rising edge of CAL
100
tckmin
tckh
tckl
tmss
tdis
tmsh
tdih
tdozx
tdov
tdoxz
TCK
TMS
TDI
TDO
tmss
tmss
TCK
TMS
tpwp, tpwe
*(PRGUSR/UBE executed in
Run-Test/Idle state)
CAL
(Note: CAL internally
initiated at device turn-on.)
VOUT = 0VDIFF
VOUT
tpwcal1, tpwcal2
tcalmin
*Note: During device JTAG programming, analog outputs will stop responding to normal input stimulus. This is because all
configuration information is erased and then re-written as part of a normal programming cycle, momentarily disrupting the input
to output signal path. Behavior is not predictable during either of these steps since the analog outputs are not clamped during
a programming cycle. Usually, however, the outputs will slew to either 0V (Ground) or 5V (V
supply
) or 2.5V (VREF
OUT
). This
behavior is partially determined by conditions existing immediately prior to device reprogramming and intermediate configura-
tions that occur during the process.
相關PDF資料
PDF描述
ISPPAC10-01SI In-System Programmable Analog Circuit
ISPPAC20 In-System Programmable Analog Circuit
ISPPAC20-01J In-System Programmable Analog Circuit
ISPPAC20-01JI In-System Programmable Analog Circuit
ISPPAC30 In-System Programmable Analog Circuit
相關代理商/技術參數
參數描述
ISPPAC10-01SI 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
ISPPAC20 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit
ISPPAC20-01J 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit
ISPPAC20-01JI 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
ISPPAC20-01TI 功能描述:SPLD - 簡單可編程邏輯器件 Not Upgrade Device CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24