參數(shù)資料
型號(hào)： ISPPAC10-01PI
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： 模擬信號(hào)調(diào)理
英文描述： In-System Programmable Analog Circuit
中文描述： SPECIALTY ANALOG CIRCUIT, PDIP28
封裝： PLASTIC, DIP-28
文件頁(yè)數(shù)： 17/23頁(yè)
文件大小： 415K
代理商： ISPPAC10-01PI
Specifications
ispPAC10
17
Design Simulation Capability
A powerful feature of PAC-Designer is its simulation
capability enabling quick and accurate verification of
circuit operation and performance. Once a circuit is
configured via the interactive design process, gain and
phase response between any input and output can then
be determined. This function is part of the simulator
capability which derives a transfer equation between the
two points and then sweeps it over the user-specified
frequency range. Figure 13 shows a typical screen plot of
the gain/phase simulator. In it are the input to output
response curves of a 2nd order biquad filter similar to the
implementation illustrated in Figure 7b. In this example,
the lowpass and bandpass characteristics of the filter are
seen.
The simulator is capable of displaying up to four separate
input to output responses. This allows multiple signal
paths to be viewed as well as intermediate results of
component changes so performance comparisons can
be made. There is also a user positioned crosshair cursor
that intersects the curves on the plot, and reads out the
gain and frequency in the lower right hand corner of the
plot window when activated.
In-System Programming
The ispPAC10 is an in-system programmable device.
This is accomplished by integrating all high voltage
programming circuitry on-chip. Programming is performed
through a 5-wire, IEEE 1149.1 (JTAG) compliant serial
port interface at normal logic levels. Once a device is
programmed, all configuration information is stored in on-
chip, non-volatile E
2
CMOS memory cells. The specifics
of the IEEE 1149.1 serial interface are described in the
interface section of this data sheet.
User Electronic Signature
A user electronic signature (UES) feature is included in
the E
2
memory of the ispPAC10. It contains 8 bits that can
be configured by the user to store unique data such as ID
codes, revision numbers or inventory control data.
Figure 13. PAC-Designer Simulation Plot Screen (Biquad Filter Configuration)
PAC Designer - [Design1:2]
File Edit View Curve Tools Options Window Help
Ready
Curve:1 Vout1/Vin1
1.8
-10
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100
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1M
10M
Gain Plot (dB)
Vo1/Vi1
Vo2/Vi1
0
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1M
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Phase Plot (Deg)
Vo1/Vi1
Vo2/Vi1
Software-Based Design Environment (Continued)
相關(guān)PDF資料
PDF描述
ISPPAC10-01SI In-System Programmable Analog Circuit
ISPPAC20 In-System Programmable Analog Circuit
ISPPAC20-01J In-System Programmable Analog Circuit
ISPPAC20-01JI In-System Programmable Analog Circuit
ISPPAC30 In-System Programmable Analog Circuit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISPPAC10-01SI 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
ISPPAC20 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit
ISPPAC20-01J 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit
ISPPAC20-01JI 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
ISPPAC20-01TI 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 Not Upgrade Device CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
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