16 FN7911.2 April 25, 2013 User Initiated Reset Recalibration of the ADC can be initiated at any time by driving the RESETN pin low fo" />
參數(shù)資料
型號(hào): ISLA224S20IR1Z
廠商: Intersil
文件頁數(shù): 8/38頁
文件大?。?/td> 0K
描述: IC ADC
標(biāo)準(zhǔn)包裝: 1
系列: *
ISLA224S
16
FN7911.2
April 25, 2013
User Initiated Reset
Recalibration of the ADC can be initiated at any time by driving
the RESETN pin low for a minimum of one clock cycle. An
open-drain driver with a drive strength in its high impedance
state of less than 0.5mA is recommended, as RESETN has an
internal high impedance pull-up to OVDD. As is the case during
power-on reset, RESETN and DNC pins must be in the proper
state for the calibration to successfully execute.
The performance of the ISLA224S changes with variations in
temperature, supply voltage or sample rate. The extent of these
changes may necessitate recalibration, depending on system
performance requirements. Best performance will be achieved
by recalibrating the ADC under the environmental conditions at
which it will operate.
A supply voltage variation of <100mV will generally result in an
SNR change of <0.5dBFS and SFDR change of <3dBc. In
situations where the sample rate is not constant, best results will
be obtained if the device is calibrated at the highest sample rate.
Reducing the sample rate by less than 80MSPS will typically
result in an SNR change of <0.5dBFS and an SFDR change of
<3dBc.
Figures 36 through 41 show the affect of temperature on SNR
and SFDR performance with power on calibration performed at
-40°C, +25°C, and +85°C. Each plot shows the variation of
SNR/SFDR across temperature after a single power on
calibration at -40°C, +25°C and +85°C. Best performance is
typically achieved by a user-initiated power on calibration at the
operating conditions, as stated earlier. However, it can be seen
that performance drift with temperature is not a very strong
function of the temperature at which the power on calibration is
performed.
FIGURE 34. ADC CORE BLOCK DIAGRAM
DIGITAL
ERROR
CORRECTION
SHA
1.25V
INP
INN
CLOCK
GENERATION
2.5- BIT
FLASH
6- STAGE
1.5- BIT/ STAGE
3- STAGE
1-BIT/ STAGE
3- BIT
FLASH
+
FLASH
2.5-BIT
FIGURE 35. CALIBRATION TIMING
CLKP
CLKN
CALIBRATION
BEGINS
CALIBRATION
COMPLETE
CALIBRATION
TIME
RESETN
CAL_STATUS
BIT
相關(guān)PDF資料
PDF描述
VI-21L-MX-F1 CONVERTER MOD DC/DC 28V 75W
HI1-674AKD-5 IC ADC 12BIT 67KSPS 1CH 28-SBDIP
VE-J13-MW-B1 CONVERTER MOD DC/DC 24V 100W
MS27656E11A5S CONN RCPT 5POS WALL MNT W/SCKT
IDT72V3641L15PFG IC SYNCFIFO 1024X36 15NS 120TQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISLA224S25 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual 14-Bit, 250/200/125 MSPS JESD204B High Speed Serial Output ADC
ISLA224S25IR1Z 功能描述:IC ADC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- 位數(shù):12 采樣率(每秒):1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散(最大):1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP(7x7) 包裝:管件 輸入數(shù)目和類型:2 個(gè)單端,單極
ISLA224S25IR48EV1Z 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual 12-Bit, 250/200/125 MSPS JESD204B High Speed Serial Output ADC
ISLEM-BDGSTKEV1Z 制造商:Intersil Corporation 功能描述:DAQ ON A STICK, E-MICRO STRAIN GAUGE, EVAL BOARD 1, ROHS COM - Bulk 制造商:Intersil Corporation 功能描述:EVAL BOARD FOR STRAIN GAUGE
ISLI2C-KIT 制造商:Intersil Corporation 功能描述:ISLI2C - USB INTERFACE - Bulk