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| 型號(hào)： | ISD-SR3000 |
| 文件頁(yè)數(shù)： | 13/120頁(yè) |
| 文件大?。?/td> | 1293K |
| 代理商： | ISD-SR3000 |
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1-8
1—HARDWARE
ISD-SR3000
Voice Solutions in Silicon
used in digital telephony (i.e., ISDN or DECT lines). The slave mode is implemented with re-
spect to IOM-2
TM
/CGI specifications.
See Table 1-4 for CODEC options for the ISD-SR3000 (ISD supports compatible CODECS in
addition to those listed below).
The CODEC interface supports the following features:
This CODEC interface uses five signals: CDIN, CDOUT, CCLK, CFSO, and CFS1. The CDIN,
CDOUT, CCLK, and CFSO pins are connected to the first CODEC. The second CODEC (for
speakerphone applications) is connected to CDIN, CDOUT, CCLK, and CFS1 pins. Data is
transferred to the CODEC (for speakerphone applications) through the CDOUT output pin.
Data is read from the CODEC through the CDIN input pin. The CCLK and CFSO pins are output
in Master mode and input in Slave mode. The CFS1 is an output pin.
Master Mode or Slave Mode.
8- or 16-bit channel width.
Long (variable) or short (fixed) frame protocol.
Single or double bit clock rate.
Single or dual channel CODECS
One or two CODECS
Multiple clock and sample rates.
One or two frame sync signals
SHORT FRAME PROTOCOL
When the short frame protocol is configured, eight or sixteen data bits are exchanged with each
CODEC in each frame (i.e., the CFSO cycle). Data transfer begins when CFSO is set to 1 for
one CCLK cycle. The data is then transmitted, bit by bit, via the CDOUT pin. Concurrently, the
received data is shifted in through the CDIN pin. Data is shifted one bit per CCLK cycle. After
the last bit has been shifted, CFS1 is set to 1 for one CCLK cycle. Then, the data from the sec-
ond CODEC is shifted out via CDOUT, concurrently with the inward shift of the data received
via CDIN.
LONG FRAME PROTOCOL
When long frame protocol is configured, eight or sixteen data bits are exchanged with each CO-
DEC, as for the short frame protocol. However, for the long frame protocol, data transfer starts
by setting CFSO to 1 for eight or sixteen CCLK cycles. Short or long frame protocol is available
in both Master and Slave modes.
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