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| 型號(hào)： | INSTRUCTIN603EWP |
| 英文描述： | Optimizing the Instruction Execution on the 603e |
| 中文描述： | 優(yōu)化了603e的指令執(zhí)行 |
| 文件頁(yè)數(shù)： | 50/54頁(yè) |
| 文件大小： | 325K |
| 代理商： | INSTRUCTIN603EWP |
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RISC Microprocessor Division
Page 50
As with the other execution units, there may also be stalls due to contention for the rename registers.
Figures 1-5
show the interaction between the IQ and CQ for a series of
lwzu
’s which are fetched into
the instruction queue two at a time. Each
lwzu
uses two general purpose register (GPR) rename
registers, one for the address operand and one for the data operand. The 603e has five GPR rename
registers available (and four FPR rename registers).
In
Figure 3
, instruction C cannot dispatch because A and B have already taken four GPR rename
registers and there is only one available.
Later, when A retires and releases its rename registers (
Figure 4
), C has the resources it needs to
dispatch. It dispatches the following cycle (
Figure 5
).
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