
RISC Microprocessor Division
Page 25
Speculative execution allows the fetcher to fetch instructions without stalling while the branch is being
resolved. Prediction does not cause any pipeline stalls unless the prediction is deemed to be incorrect.
If the prediction is incorrect, it is the function of the BPU to perform the necessary tasks to recover from
speculation.
Branch prediction of the type used by the 603e is correct approximately 86% of the time. Due to the
603e’s ability to invert the normal prediction mechanism, a smart programmer or compiler can attain
greater prediction accuracy.
Mispredicted branches, which occur infrequently even using only the default speculation mechanism,
only incur significant performance penalties when speculative branches also result in cache misses on
the mispredicted path.
Since incorrect predictions can potentially cause many stalls, it is possible to improve performance by
avoiding prediction in some code fragments. By separating the instruction that is setting the branch
condition from the branch that uses it, it is possible to prevent the processor from executing
speculatively altogether.
In the 603e, we can calculate the approximate separation distance by using worst case analysis for a
conditional branch dependent on the CR register. Assuming that the processor dispatches 3
instructions per clock (2 instructions and a unconditional branch or nop), and assuming a worst case
conditional register update time of 3 clocks, we calculate that by separating the branch condition from
the condition register update instruction by 9 instructions, we will avoid speculative execution. For most
code fragments, the 603e can dispatch instructions at a peak rate of 2 instructions. Additionally, most
instructions (such as the COMPARE instruction) take only 1 clock to update the Condition Register.
Under these conditions, one can prevent speculative execution by separating the branch condition from
the condition register update instruction by only 3 instructions.