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參數(shù)資料
| 型號： | CLC030 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | SMPTE 292M/259M Digital Video Serializer with Video and Ancilliary Data FIFOs and Integrated Cable Driver |
| 中文描述： | 的SMPTE 292M/259M數(shù)字視頻串行器，帶有視頻和輔助數(shù)據(jù)FIFO和內(nèi)置電纜驅(qū)動器 |
| 文件頁數(shù)： | 21/29頁 |
| 文件大?。?/td> | 329K |
| 代理商： | CLC030 |
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Device Operation
(Continued)
out-of-band frequency products which can be produced by
abrupt transitions in the chroma and luma data when fed to
D-to-A converters and picture monitors. The default condi-
tion of this bit is reset (off).
I/O PIN 0 THROUGH 7 CONFIGURATION REGISTERS
(Addresses 0Fh through 16h)
The
Multi-function I/O Bus Pin Configuration
registers are
used to map the bits of the multi-function I/O port to selected
bits of the Configuration and Control Registers. Table 6
details the available Configuration and Control register bit
functions that may be mapped to the port and their corre-
sponding mapping addresses.
Pin
#
SEL[5]
in each register
indicates whether the port pin is input or output. The port pin
will be an input when this bit is set and an output when reset.
Input-only functions may not be configured as outputs and
vice versa. The remaining lower-order five address bits dis-
tinguish the particular function.
Example:
Program, via the AD port, I/O port bit 0 as output
for the CRC Luma Error bit in the control registers.
1.
Set
ANC/CTRL
to a logic-low.
2.
Set
RD/WR
to a logic-low.
3.
Present 00Fh to
AD[9:0]
as the
I/O PIN 0 CONFIG
register address.
4.
Toggle
ACLK
.
5.
Present 310h to
AD[9:0]
as the register data, the bit
address of the CRC Luma Error bit in the control regis-
ters.
6.
Toggle
ACLK
.
TEST MODE 0 REGISTER (Address 55h)
The four bits of this register are intended for use as test
mode functions. They are not normal operating modes. The
bits may be set (enabled) or reset (disabled) by writing to the
register. Reading this register sets (enables) all bits to their
default ON condition.
The
Scrambler_Enable
bit enables operation of the SMPTE
scrambler function. This bit is normally ON.
The
NRZI_Enable
bit enables operation of the NRZ-to-NRZI
conversion function. This bit is normally ON.
The
LSB_Clipping
bit enables operation of the LSB clipping
function. This bit is normally ON.
The
Sync_Detect_Enable
bit enables operation of the TRS
detector function. This bit is normally ON.
C
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PDF描述 |
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| CLC031A | SMPTE 292M/259M Digital Video Deserializer / Descrambler with Video and Ancillary Data FIFOs |
| CLC031AVEC | SMPTE 292M/259M Digital Video Deserializer / Descrambler with Video and Ancillary Data FIFOs |
| CLC031 | SMPTE 292M/259M Digital Video Deserializer / Descrambler with Video and Ancilliary Data FIFOs |
| CLC031VEC | SMPTE 292M/259M Digital Video Deserializer / Descrambler with Video and Ancilliary Data FIFOs |
| CLC034 | SMPTE 292M / 259M Adaptive Cable Equalizer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC030_06 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:SMPTE 292M/259M Digital Video Serializer with Video and Ancillary Data FIFOs and Integrated Cable Driver |
| CLC030AVEC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CLC030VEC | 功能描述:IC SERIALIZER VIDEO DGTL 64-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 串行器，解串行器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 功能:解串器 數(shù)據(jù)速率:2.5Gbps 輸入類型:串行 輸出類型:并聯(lián) 輸入數(shù):- 輸出數(shù):24 電源電壓:1.8 V ~ 3.3 V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:64-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-TQFP-EP（10x10） 包裝:管件 |
| CLC031 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:SMPTE 292M/259M Digital Video Deserializer / Descrambler with Video and Ancilliary Data FIFOs |
| CLC03-10N_-RC | 制造商:ALLIED 制造商全稱:Allied Components International 功能描述:Ceramic Core Laser Cut Chip Inductor |
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