參數(shù)資料
型號(hào)： IDT88P8344BHGI
廠(chǎng)商： IDT, Integrated Device Technology Inc
文件頁(yè)數(shù)： 57/98頁(yè)
文件大?。?/td> 0K
描述： IC SPI3-SPI4 EXCHANGE 820-PBGA
標(biāo)準(zhǔn)包裝： 24
系列： *
其它名稱(chēng)： 88P8344BHGI
60
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
There is one register for SPI-3 egress fill level register per SPI-3 interface.
Each register has read-only access. The bit fields of the SPI-3 egress fill level
register are described.
ADD_PAR_ERR
A single address parity error is introduced on a SPI-
3 egress LP through the ADD_PAR_ERR bit field. The LP affected by the
ADD_PAR_ERR bit field is enumerated in the PORT_ADDRESS field.
0=No parity error introduced
1=Introduce a single address parity error on a SPI-3 egress LP
DAT_PAR_ERR
A single data parity error is introduced on a SPI-3
egress LP through the DAT_PAR_ERR bit field. The LP affected by the
DAT_PAR_ERR bit field is enumerated in the PORT_ADDRESS field.
0=No parity error introduced
1=Introduce a single data parity error on a SPI-3 egress LP
PORT_ADDRESS
The LP affected by both the ADD_PAR_ERR and
theDAT_PAR_ERRbitfieldsisenumeratedinthePORT_ADDRESSfield.The
value of the PORT_ADDRESS is set from 0x00 to 0xFF.
SPI-3 egress fill level register (Block_base 0x0700
+ Register_offset 0x03)
FILL_CUR
Current SPI-3 egress buffer fill level. Since this is a real-time
register, the value read from it will change rapidly and is used for internal
diagnosticsonly.
I_FCLK_AV Current SPI-3 egress clock availability is checked here.
0=SPI-3 egress clock transitions were not detected on a
SPI-3 port
1=SPI-3egressclocktransitionsweredetectedonaSPI-
3 port
SPI-3 egress max fill level register (Block_base
0x0700 + Register_offset 0x04)
TABLE 58 - SPI-3 EGRESS FILL LEVEL REGISTER
(REGISTER_OFFSET=0x03)
Field
Bits
Length
Initial Value
FILL_CUR
3:0
4
0x0
Reserved
4
1
0x0
E_FCLK_AV
5
1
0b0
TABLE 59 - SPI-3 EGRESS MAX FILL LEVEL REGIS-
TER(REGISTER_OFFSET=0x04)
Field
Bits
Length
Initial Value
FILL_MAX
3:0
4
0x0
ThereisoneregisterforSPI-3egressmaxfillLevelperSPI-3interface.Each
register has read-only access, and is cleared after reading. 0xF is the highest
filling level, meaning all egress buffers had been full at some time since the last
read of the FILL_MAX field. The units of FILL_MAX are one-sixteenth of the
available egress buffering. Each unit is equal to 128 bytes. The bit field of the
SPI-3 egress max fill Level register is described.
FILL_MAX
Maximum SPI-3 egress buffer fill level since the last read
of the SPI-3 egress Max Fill Level Register
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