參數(shù)資料
型號： IDT88P8344BHGI
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 52/98頁
文件大?。?/td> 0K
描述： IC SPI3-SPI4 EXCHANGE 820-PBGA
標(biāo)準(zhǔn)包裝： 24
系列： *
其它名稱： 88P8344BHGI
56
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
9.3 Indirect registers for SPI-3A, SPI-3B, SPI-
3C, SPI-3D modules
Module A is at Module_base 0x0000
Module B is at Module_base 0x2000
Module C is at Module_base 0x4000
Module D is at Module_base 0x6000
Table Number, Page
Block_base, Register_offset
Title of Register
49, page 57
0x0000, 0x00-0xFF
SPI-3 ingress LP to LID map
50, page 57
0x0200, 0x00
SPI-3 general configuration register
51, page 58
0x0200, 0x01
SPI-3 ingress configuration register
52, page 58
0x0200, 0x02
SPI-3 ingress fill level register
53, page 58
0x0200, 0x03
SPI-3 ingress max fill level register
54, page 58
0x0500, 0x00-0x3F
SPI-3 egress LID to LP map
55, page 59
0x0700, 0x00
SPI-3 egress configuration register
56, page 59
0x0700, 0x01
SPI-4 ingress to SPI-4 egress flow control register
57, page 59
0x0700, 0x02
SPI-3 egress test register
58, page 60
0x0700, 0x03
SPI-3 egress fill level register
59, page 60
0x0700, 0x04
SPI-3 egress max fill level register
60, page 61
0x0A00, 0x00-0x17F
LID associated event counters
61, page 61
0x0C00, 0x00-0x0B
Non LID associated event counters
62, page 62
0x0C00, 0x0C
Non LID associated interrupt indication register
63, page 62
0x0C00, 0x0D
Non LID associated interrupt enable register
64, page 62
0x0C00, 0x0E
LID associated interrupt indication register
65, page 62
0x0C00, 0x0F
LID associated interrupt enable register
66, page 63
0x0C00, 0x10-0x15
Non critical LID associated capture table
67, page 63
0x0C00, 0x16-0x17
SPI-3 to SPI-4 critical LID interrupt indication registers
68, page 63
0x0C00, 0x18-0x19
SPI-3 to SPI-4 critical LID interrupt enable registers
69, page 63
0x0C00, 0x1A-0x1B
SPI-4 to SPI-3 critical LID interrupt indication registers
70, page 63
0x0C00, 0x1C-0x1D
SPI-4 to SPI-3 critical LID interrupt enable registers
71, page 63
0x0C00, 0x1E
Critical events source indication register
72, page 64
0x1000, 0x00-0x3F
SPI-3 ingress packet length configuration register
73, page 64
0x1100, 0x00-0x3F
SPI-4 egress port descriptor table
74, page 64
———————-
SPI-4 egress direction code assignment
75, page 64
0x1200, 0x00-0x3F
SPI-3 ingress port descriptor table
76, page 65
0x1300, 0x00
SPI-3 to SPI-4 PFP register
77, page 65
———————-
NR_LID field encoding
78, page 65
0x1300, 0x01
SPI-3 to SPI-4 flow control register
79, page 66
0x1600, 0x00-0x3F
SPI-4 ingress packet length register
80, page 66
0x1700, 0x00-0x3F
SPI-3 egress port descriptor table
81, page 66
———————-
SPI-3 egress direction code assignment
82, page 66
0x1800, 0x00-0x3F
SPI-4 ingress port descriptor table
83, page 67
0x1900, 0x00
SPI-4 to SPI-3 PFP register
84, page 67
———————-
NR_LID field encoding
TABLE 48 - MODULE A/B/C/D INDIRECT REGISTER
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