參數(shù)資料
型號(hào): ICS9214YGLF-T
英文描述: Rambus XDR Clock Generator
中文描述: Rambus公司的XDR時(shí)鐘發(fā)生器
文件頁(yè)數(shù): 5/16頁(yè)
文件大?。?/td> 228K
代理商: ICS9214YGLF-T
5
Integrated
Circuit
Systems, Inc.
ICS9214
0809D—04/07/06
Device ID and SMBus Device Address
The device ID (SMB_A(1:0)) is part of the SMBus device address. The least significant bit of the address designates a write
or read operation. Table 3 shows the addresses for four ICS9214 devices on the same SMBus.
PLL Multiplier
Table 2 shows the frequency multipliers in the PLL, selectable by programming the MULT0, MULT1 and MULT2 bits in the
SMBus Multiplier Control register. Power up default is 4.
Table 2. PLL Multiplier Selection
Byte 0
Bit 6
MULT2
0
0
0
0
1
1
1
1
Bit 5
MULT1
0
0
1
1
0
0
1
1
Bit 4
MULT0
0
1
0
1
0
1
0
1
3
4
5
6
8
300
3
400
2
500
600
800
450
750
375
400
533
667
800
-
3
600
-
3
500
9/2
15/2
15/4
NOTES
1 Output frequencies are based on nominal input frequencies of 100 MHz and 133 MHz. The PLL
multipliers are also applicable to spread spectrum modulated input clocks.
2 Default muliplier value at power up
3 Outputs at these settings do not conform to the AC Output Characteristics, or are not supported.
4 Shaded areas are under development and are not yet supported
Output Frequency (MHz)
CLK_INT/C =
100 MHz
1
Frequency
Multiplier
CLK_INT/C =
133 MHz
1
Table 3. SMBus Device Addresses
ICS9214
Device
Operation
Write
Read
Write
Read
Write
Read
Write
Read
SMB_A1
SMB_A0
WR#/RD
0
1
0
1
0
1
0
1
D8
D9
DA
DB
DC
DD
DE
DF
0
2
Hex Address
0
1
3
8-bit SMBus Device Address, Including Oper.
1
11011
1
0
0
1
1
0
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