參數(shù)資料
型號: ICS9214YGLF-T
英文描述: Rambus XDR Clock Generator
中文描述: Rambus公司的XDR時(shí)鐘發(fā)生器
文件頁數(shù): 10/16頁
文件大小: 228K
代理商: ICS9214YGLF-T
10
Integrated
Circuit
Systems, Inc.
ICS9214
0809D—04/07/06
Thermal Characteristics
Parameter
Symbol Conditions
θ
JA
Still air
θ
JA
1 m/s air flow
θ
JA
3 m/s air flow
θ
JC
Min.
Typ.
120
95
80
20
Max.
Units
°C/W
°C/W
°C/W
°C/W
Thermal Resistance Junction to Case
Thermal Resistance Junction to Top of
Case
Maximum Case Temp
Ψ
JT
Still Air
4.5
°C/W
120
°C
Thermal Resistance Junction to
Ambient
AC Characteristics-Outputs
T
A
= 0°C to +70°C; Supply Voltage AVDD2.5, VDD2.5 = 2.5 V +/- 0.125V (unless otherwise stated)
PARAMETER
1
SYMBOL
Output clock cycle time
t
CYCLE
f = 400 to 635 MHz
f = 635 to 800 MHz
Output Phase error when
tracking SSC
CONDITION
MIN
1.5
-
-
TYP
MAX
2.5
40
30
UNITS
ns
ps
ps
t
ERR,SSC
-100
100
ps
Change in skew
t
SKEW
3
T
A
= 0°C to +70°C,
AVDD2.5, VDD2.5 =
2.5 V +/- 0.125V
-
15
ps
Long term average output
duty cycle
Cycle-to-cycle duty cycle
error
DC
45
55
%
f = 400 to 635 MHz
f = 635 to 800 MHz
20% to 80% of output
voltage
-
-
40
30
ps
ps
Output rise and fall times
t
R
, t
F
100
300
ps
Difference between
output rise and fall time
on same pin of a single
device
Dynamic output
impedance
Notes:
1. Max and min output clock cycle times are based on nominal output frequencies
of 400 and 667 MHz respectively. For spread spectrum modulated input clocks,
the output clocks track the input modulation.
t
R-F
20% to 80% of output
voltage, f = 400 to 800 MHz
-
100
ps
Z
OUT
4
V
OL
= 0.9 V
1000
-
5. Guaranteed by design and characterization, not 100% tested in production
is measured at common mode voltage.
4. Zout is defined at the output pins.
2. Output short-term jitter is the absolute value fo the worst case deviation and is
defined in the Jitter section.
3. tSKEW is the timing difference between any two of the four differential clocks and
Short term jitter (over 1 to
6 clock cycles)
t
J
2
t
DCERR
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