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參數(shù)資料
| 型號： | ICS9214YGLF-T |
| 英文描述： | Rambus XDR Clock Generator |
| 中文描述： | Rambus公司的XDR時鐘發(fā)生器 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 228K |
| 代理商： | ICS9214YGLF-T |
4
Integrated
Circuit
Systems, Inc.
ICS9214
0809D—04/07/06
SMB Table: Output Control Register
Control
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Test Mode
MULT2
MULT1
MULT0
ODCLK_T/C0
ODCLK_T/C1
ODCLK_T/C2
ODCLK_T/C3
Reserved for Vendor
Multiplier Select
Multiplier Select
Multiplier Select
Output Control
Output Control
Output Control
Output Control
RW
RW
RW
RW
RW
RW
RW
RW
0
0
0
1
1
1
1
1
Disable = Output in high-impedance state
Enable = Output is switching
SMB Table: Frequency Multiplier Control Register
Control
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Test Mode
RW
RW
RW
RW
RW
RW
RW
RW
0
0
0
0
0
0
0
0
Reserved for Vendor
SMB Table: Revision & Vendor ID Register
Control
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RID4
RID3
RID2
RID1
RID0
VID2
VID1
VID0
R
R
R
R
R
R
R
R
X
X
X
X
X
0
0
1
NOTES:
1. PWD = Power Up Default
Disable
Enable
-
-
-
-
-
-
-
-
-
-
Vendor ID
-
-
-
-
-
Revision ID
-
-
-
-
-
-
0
1
See Table 2.
PWD
1
PWD
-
-
-
Byte 2
Pin #
Name
Type
-
-
-
-
Byte 0
Pin #
Name
Type
Disable
Enable
0
1
-
Byte 1
Pin #
27,26
24,23
20,19
17,16
-
-
-
-
-
-
-
-
-
-
-
-
Name
Type
0
1
-
-
-
-
-
PWD
Disable
Disable
Disable
Enable
Enable
Enable
Disable
Enable
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