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參數(shù)資料
| 型號(hào)： | HYB25D512800AT-7 |
| 英文描述： | ?512Mb (64Mx8) DDR266A (2-3-3)? |
| 中文描述： | ？的512Mb（64Mx8）DDR266A（2-3-3）？ |
| 文件頁數(shù)： | 13/76頁 |
| 文件大?。?/td> | 1218K |
| 代理商： | HYB25D512800AT-7 |
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2002-05-06
Page 13 of 76
HYB25D128400/800/160AT(L)
128-Mbit Double Data Rate SDRAM
Extended Mode Register
The
E
xtended Mode Register controls functions beyond those controlled by the Mode Register; these addi-
tional functions include DLL enable/disable, and output drive strength selection (optional). These functions
are controlled via the bits shown in the
E
xtended Mode Register Definition. The
E
xtended Mode Register is
programmed via the Mode Register Set command (with BA0 = 1 and BA1 = 0) and retains the stored informa-
tion until it is programmed again or the device loses power. The
E
xtended Mode Register must be loaded
when all banks are idle, and the controller must wait the specified time before initiating any subsequent oper-
ation. Violating either of these requirements result in unspecified operation.
DLL Enable/Disable
The DLL must be enabled for normal operation. DLL enable is required during power up initialization, and
upon returning to normal operation after having disabled the DLL for the purpose of debug or evaluation. The
DLL is automatically disabled when entering self refresh operation and is automatically re-enabled upon exit
of self refresh operation. Any time the DLL is enabled, 200 clock cycles must occur before a Read command
can be issued. This is the reason 200 clock cycles must occur before issuing a Read or
W
rite command upon
exit of self refresh operation.
Output Drive Strength
The normal drive strength for all outputs is specified to be SSTL_2, Class II. I-V curves for the normal drive
strength are included in this document. In addition this design version supports a weak driver mode for lighter
load and/or point-to-point environments which can be activated during mode register set.
I-V curves for the weak driver mode will be included in this document later.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYB25D512800AT-8 | ?512Mb (64Mx8) DDR200 (2-2-2)? |
| HYB25M128160C-653 | RAMBUS DRAM |
| HYB25M128160C-745 | RAMBUS DRAM |
| HYB25M128160C-840 | RAMBUS DRAM |
| HYB25M128160C-845 | RAMBUS DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB25D512800CE-5 | 功能描述:IC DDR SDRAM 512MBIT 66TSOP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:16K (2K x 8) 速度:2MHz 接口:SPI 3 線串行 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 產(chǎn)品目錄頁面:1449 (CN2011-ZH PDF) |
| HYB25D512800CE-6 | 功能描述:IC DDR SDRAM 512MBIT 66TSOP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:16K (2K x 8) 速度:2MHz 接口:SPI 3 線串行 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 產(chǎn)品目錄頁面:1449 (CN2011-ZH PDF) |
| HYB25DC512160CE-5 | 制造商:Infineon Technologies AG 功能描述: 制造商:QIMONDA 功能描述: |
| HYB25L256160AC-7.5 | 制造商:Infineon Technologies AG 功能描述: |
| HYB25L512160AC-7.5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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